Patents by Inventor Anand Haridass

Anand Haridass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11743058
    Abstract: Authenticating a host computer and NVDIMM pair using lookup tables for a challenge/response exchange between the pair of devices. The NVDIMM is challenged by the host computer for which a response associated with the physically unclonable function of a NVDIMM component is provided. The NVDIMM challenges the host computer for which a response associated with the physically unclonable function of a host computer component is provided. Additional security stores a modified response associated with run-time physically unclonable functions associated with the host computer and NVDIMM pair for use in future challenge/response exchanges.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: August 29, 2023
    Assignee: International Business Machines Corporation
    Inventors: Janani Swaminathan, Trinadhachari Kosuru, Anand Haridass, Santosh Balasubramanian
  • Publication number: 20230137191
    Abstract: An apparatus of a computing node of a computing network, a method to be performed at the apparatus, one or more computer-readable storage media storing instructions to be implemented at the apparatus, and a system including the apparatus. The apparatus includes a processing circuitry to: receive, from an orchestration block, a first workload (WL) package including a WL and first computing resource (CR) metadata; recompose the first WL package into a second WL package that includes the WL and second CR metadata that is different from the first CR metadata, is based at least in part on CR information regarding a server architecture onto which the WL is to be deployed, and is further to indicate one or more processors of the server architecture onto which the WL is to be deployed; and send the second WL package to one or more processors of the server architecture for deployment of the WL thereon.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 4, 2023
    Inventors: Adrian C. Hoban, Thijs Metsch, John J. Browne, Kshitij A. Doshi, Francesc Guim Bernat, Anand Haridass, Chris M. MacNamara, Amruta Misra, Vikrant Thigle
  • Publication number: 20230037609
    Abstract: Examples described herein relate to an interface and a network interface device coupled to the interface and comprising circuitry to: control power utilization by a first set of one or more devices based on power available to a system that includes the first set of one or more devices, wherein the system is communicatively coupled to the network interface and control cooling applied to the first set of one or more devices.
    Type: Application
    Filed: September 28, 2022
    Publication date: February 9, 2023
    Inventors: Paniraj GURURAJA, Navneeth JAYARAJ, Mahammad Yaseen Isasaheb MULLA, Nitesh GUPTA, Hemanth MADDHULA, Laxminarayan KAMATH, Jyotsna BIJAPUR, Delraj Gambhira DAMBEKANA, Vikrant THIGLE, Amruta MISRA, Anand HARIDASS, Rajesh POORNACHANDRAN, Krishnakumar VARADARAJAN, Sudipto PATRA, Nikhil RANE, Teik Wah LIM
  • Publication number: 20220415742
    Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate, and a die, electrically coupled to the package substrate, including a silicon substrate having a first surface and an opposing second surface; a device layer at the first surface of the silicon substrate; and a dielectric layer, having a heater trace, at the second surface of the silicon substrate.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Applicant: Intel Corporation
    Inventors: Bijoyraj Sahu, Tolga Acikalin, Anand Haridass, Vikrant Thigle
  • Patent number: 11307796
    Abstract: A method stores data that handles page faults in an appropriate memory device based on a standing memory policy. One or more processors receive user requested memory buffer attributes that describe memory buffer attributes needed for various processes. The processor(s) store the user requested memory buffer attributes in an operating system virtual memory representation that describes various types of memories used by the system, create a standing memory policy based on the user requested memory buffer attributes, and store data on an appropriate memory device based on the standing memory policy. The processor(s) receive a page fault, which is based on the data being called by a process but not being currently mapped by a memory management unit (MMU) into a virtual address space of the process. The processor(s) then retrieve and return the data stored on the appropriate memory device in order to address the page fault.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: April 19, 2022
    Assignee: International Business Machines Corporation
    Inventors: Anshuman Khandual, Saravanan Sethuraman, Venkata K. Tavva, Anand Haridass
  • Patent number: 11221905
    Abstract: Embodiments relate to monitoring computing hardware in a computing infrastructure facility. Image data and environmental data are received and a current operational status for a computing hardware component is determined from the image data. A hardware operational status tracking model and environment tracking model for the computing hardware component are updated. Embodiments can perform a root cause analysis if the current operational status is a fault status to determine if the fault status was caused by environmental conditions.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: January 11, 2022
    Assignee: International Business Machines Corporation
    Inventors: Vidhya Shankar Venkatesan, Anand Haridass, Diyanesh B. Chinnakkonda Vidyapoornachary, Arun Joseph
  • Patent number: 11183140
    Abstract: A method, computer system, and computer program product for human relationship-aware augmented display are provided. The embodiment may include identifying one or more potential viewers utilizing real-time sensor data. The embodiment may also include extracting relationship information related to relationships among each identified viewer and one or more companions based on a plurality of data from a plurality of databases. The embodiment may further include creating a relationship graph based on the extracted relationship information. The embodiment may also include determining a relationship model based on the created relationship graph. The embodiment may further include mapping the determined relationship model to content. The embodiment may also include augmenting display systems with the content. The embodiment may further include displaying the augmented content on one or more display systems.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Diwesh Pandey, Arun Joseph, Anand Haridass
  • Publication number: 20210281431
    Abstract: Authenticating a host computer and NVDIMM pair using lookup tables for a challenge/response exchange between the pair of devices. The NVDIMM is challenged by the host computer for which a response associated with the physically unclonable function of a NVDIMM component is provided. The NVDIMM challenges the host computer for which a response associated with the physically unclonable function of a host computer component is provided. Additional security stores a modified response associated with run-time physically unclonable functions associated with the host computer and NVDIMM pair for use in future challenge/response exchanges.
    Type: Application
    Filed: March 5, 2020
    Publication date: September 9, 2021
    Inventors: Janani Swaminathan, Trinadhachari Kosuru, Anand Haridass, Santosh Balasubramanian
  • Patent number: 10996074
    Abstract: An approach for recommending an activity during travel. The approach includes receiving a request for a travel destination and a desired arrival time. Furthermore, the approach determines a route to the travel destination and retrieves external data based on the route. Based on the retrieved data and the route, the approach calculates and outputs an initial activity list. And the approach measures vehicle dynamics based on one or more motion sensors and updates and outputs the activity list based on the vehicle dynamics.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 4, 2021
    Assignee: International Business Machines Corporation
    Inventors: Diwesh Pandey, Shiladitya Ghosh, Shashidhar Reddy, Arun Joseph, Anand Haridass
  • Patent number: 10891056
    Abstract: Systems, methods, and computer-readable media are disclosed for virtualizing memory compute function resources to improve resource utilization and system performance are disclosed. A virtualized hypervisor may be provided that is configured to instantiate a respective memory function controller of each memory controller present in a system/device. The virtualized hypervisor may be further configured to maintain the memory function controllers and their corresponding memory compute functionality as shareable resources that can be allocated to system components upon request. The virtualized hypervisor may allocate a memory function controller and its corresponding memory compute functionality to a system component, and may further provide the system component with an exclusive grant of memory compute pages that can be utilized by the allocated memory function controller to execute a memory compute function to perform one or more operations (e.g., one or more computations) on behalf of the system component.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: January 12, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edgar Cordero, Anand Haridass, Arun Joseph, Diyanesh B. C. Vidyapoornachary
  • Patent number: 10884055
    Abstract: A system for post-silicon leakage characterization is configured to apply a rail voltage to a hardware component; cause the hardware component to operate at a particular frequency; cause a cooling device, coupled to the hardware component, to operate at a cooling capacity; run a workload on the hardware component after applying the rail voltage, causing the hardware component to operate at a particular frequency, and causing the cooling device to operate at a particular cooling capacity; discontinue the workload and clocks of the hardware component after a temperature of the hardware component has reached a steady high point; continuously measure temperature and leakage power of the hardware component after discontinuing the workload until the temperature of the hardware component has reached a steady low point; and adjust a power management procedure for the hardware component based on measured temperature and measured leakage power of the hardware component.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: January 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Anand Haridass, Arun Joseph, Charles R. Lefurgy, Spandana V. Rachamalla
  • Publication number: 20200166373
    Abstract: An approach for recommending an activity during travel. The approach includes receiving a request for a travel destination and a desired arrival time. Furthermore, the approach determines a route to the travel destination and retrieves external data based on the route. Based on the retrieved data and the route, the approach calculates and outputs an initial activity list. And the approach measures vehicle dynamics based on one or more motion sensors and updates and outputs the activity list based on the vehicle dynamics.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Inventors: Diwesh Pandey, Shiladitya Ghosh, Shashidhar Reddy, Arun Joseph, Anand Haridass
  • Publication number: 20200118515
    Abstract: A method, computer system, and computer program product for human relationship-aware augmented display are provided. The embodiment may include identifying one or more potential viewers utilizing real-time sensor data. The embodiment may also include extracting relationship information related to relationships among each identified viewer and one or more companions based on a plurality of data from a plurality of databases. The embodiment may further include creating a relationship graph based on the extracted relationship information. The embodiment may also include determining a relationship model based on the created relationship graph. The embodiment may further include mapping the determined relationship model to content. The embodiment may also include augmenting display systems with the content. The embodiment may further include displaying the augmented content on one or more display systems.
    Type: Application
    Filed: October 10, 2018
    Publication date: April 16, 2020
    Inventors: DIWESH PANDEY, ARUN JOSEPH, ANAND HARIDASS
  • Publication number: 20200104264
    Abstract: A method stores data that handles page faults in an appropriate memory device based on a standing memory policy. One or more processors receive user requested memory buffer attributes that describe memory buffer attributes needed for various processes. The processor(s) store the user requested memory buffer attributes in an operating system virtual memory representation that describes various types of memories used by the system, create a standing memory policy based on the user requested memory buffer attributes, and store data on an appropriate memory device based on the standing memory policy. The processor(s) receive a page fault, which is based on the data being called by a process but not being currently mapped by a memory management unit (MMU) into a virtual address space of the process. The processor(s) then retrieve and return the data stored on the appropriate memory device in order to address the page fault.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Inventors: ANSHUMAN KHANDUAL, SARAVANAN SETHURAMAN, VENKATA K. TAVVA, ANAND HARIDASS
  • Publication number: 20190354420
    Abstract: Embodiments relate to monitoring computing hardware in a computing infrastructure facility. Image data and environmental data are received and a current operational status for a computing hardware component is determined from the image data. A hardware operational status tracking model and environment tracking model for the computing hardware component are updated. Embodiments can perform a root cause analysis if the current operational status is a fault status to determine if the fault status was caused by environmental conditions.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 21, 2019
    Inventors: Vidhya Shankar VENKATESAN, Anand HARIDASS, Diyanesh B. CHINNAKKONDA VIDYAPOORNACHARY, Arun JOSEPH
  • Publication number: 20190258399
    Abstract: Systems, methods, and computer-readable media are disclosed for virtualizing memory compute function resources to improve resource utilization and system performance are disclosed. A virtualized hypervisor may be provided that is configured to instantiate a respective memory function controller of each memory controller present in a system/device. The virtualized hypervisor may be further configured to maintain the memory function controllers and their corresponding memory compute functionality as shareable resources that can be allocated to system components upon request. The virtualized hypervisor may allocate a memory function controller and its corresponding memory compute functionality to a system component, and may further provide the system component with an exclusive grant of memory compute pages that can be utilized by the allocated memory function controller to execute a memory compute function to perform one or more operations (e.g., one or more computations) on behalf of the system component.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventors: EDGAR CORDERO, ANAND HARIDASS, ARUN JOSEPH, DIYANESH B. C. VIDYAPOORNACHARY
  • Patent number: 10354028
    Abstract: A computer-implemented method includes receiving a unit, wherein each unit includes one or more blocks. The computer-implemented method further includes selecting one or more input pins for each of said one or more blocks. The computer-implemented method further includes assigning a numerical value to each of said one or more input pins to yield at least one numerical sequence. The computer-implemented method further includes, for each numerical sequence of the at least one numerical sequence, performing a check on the numerical sequence to yield a number of fails. The computer-implemented method further includes determining a simulation condition for power modeling of the unit based on optimizing a numerical sequence with respect to the number of fails. The computer-implemented method further includes determining a number of design errors of the unit based on the simulation condition. A corresponding computer system and computer program product are also disclosed.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Anand Haridass, Arun Joseph, Pradeep Kumar Nalla, Rahul M. Rao
  • Publication number: 20180372797
    Abstract: A system for post-silicon leakage characterization is configured to apply a rail voltage to a hardware component; cause the hardware component to operate at a particular frequency; cause a cooling device, coupled to the hardware component, to operate at a cooling capacity; run a workload on the hardware component after applying the rail voltage, causing the hardware component to operate at a particular frequency, and causing the cooling device to operate at a particular cooling capacity; discontinue the workload and clocks of the hardware component after a temperature of the hardware component has reached a steady high point; continuously measure temperature and leakage power of the hardware component after discontinuing the workload until the temperature of the hardware component has reached a steady low point; and adjust a power management procedure for the hardware component based on measured temperature and measured leakage power of the hardware component.
    Type: Application
    Filed: May 25, 2018
    Publication date: December 27, 2018
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Anand Haridass, Arun Joseph, Charles R. Lefurgy, Spandana V. Rachamalla
  • Patent number: 10031180
    Abstract: A system for post-silicon leakage characterization is configured to apply a rail voltage to a hardware component; cause the hardware component to operate at a particular frequency; cause a cooling device, coupled to the hardware component, to operate at a cooling capacity; run a workload on the hardware component after applying the rail voltage, causing the hardware component to operate at a particular frequency, and causing the cooling device to operate at a particular cooling capacity; discontinue the workload and clocks of the hardware component after a temperature of the hardware component has reached a steady high point; continuously measure temperature and leakage power of the hardware component after discontinuing the workload until the temperature of the hardware component has reached a steady low point; and adjust a power management procedure for the hardware component based on measured temperature and measured leakage power of the hardware component.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: July 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Anand Haridass, Arun Joseph, Charles R. Lefurgy, Spandana V. Rachamalla
  • Publication number: 20180113612
    Abstract: Systems, methods, and computer-readable media are disclosed for virtualizing memory compute function resources to improve resource utilization and system performance are disclosed. A virtualized hypervisor may be provided that is configured to instantiate a respective memory function controller of each memory controller present in a system/device. The virtualized hypervisor may be further configured to maintain the memory function controllers and their corresponding memory compute functionality as shareable resources that can be allocated to system components upon request. The virtualized hypervisor may allocate a memory function controller and its corresponding memory compute functionality to a system component, and may further provide the system component with an exclusive grant of memory compute pages that can be utilized by the allocated memory function controller to execute a memory compute function to perform one or more operations (e.g., one or more computations) on behalf of the system component.
    Type: Application
    Filed: October 26, 2016
    Publication date: April 26, 2018
    Inventors: Edgar R. Cordero, Anand Haridass, Arun Joseph, Diyanesh B. C. Vidyapoornachary