Patents by Inventor Anand M Shah
Anand M Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7116955Abstract: An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error terms to determine a desired adjustment to the total gain and a desired adjustment to the distribution of the gain between the wide-band VGA and the narrow-band VGA. The AGC circuit also minimizes the noise figure of the narrow-band VGA subject to linearity constraints.Type: GrantFiled: September 24, 2002Date of Patent: October 3, 2006Assignee: ATI Technologies, Inc.Inventors: Troy A. Schaffer, Samir N. Hulyalkar, Anand M. Shah
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Patent number: 7006565Abstract: An equalizer for use in a communication receiver includes an infinite impulse response (IIR) feedback filter operated in acquisition and tracking feedback modes on a sample by sample basis to form a hybrid Decision Feedback Equalizer (DFE) architecture. In acquisition mode, soft decision samples from the filtered received signal are input to the IIR filter. In the tracking mode, hard decision samples from a slicer are input to the IIR filter. Acquisition and tracking operating modes are selected in accordance with a set of decision rules on a sample by sample basis based on the quality of the current hard decision. If the current hard decision is low quality, then the soft decision sample (acquisition mode) is used. If the current hard decision is high quality, then the hard decision sample (tracking mode) is used. In such manner, the DFE is operated in a hybrid mode, i.e., using both soft and hard decisions on a sample by sample basis.Type: GrantFiled: April 14, 2000Date of Patent: February 28, 2006Assignee: ATI Technologies Inc.Inventors: Thomas J Endres, Samir N Hulyalkar, Christopher H Strolle, Troy A Schaffer, Anand M Shah
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Patent number: 6970523Abstract: A multiple channel diversity receiver includes joint automatic gain control (AGC) signal processing wherein the first and second channels of the multiple channel diversity receiver share at least one joint AGC loop. The maximum difference between the AGC feedback signal in the control loop for the first channel and the AGC feedback control signal in the control loop for the second channel is limited to a selectable maximum differential. The AGC control loop with the stronger first RF signal thus limits the maximum amount that the weaker signal is amplified in the AGC control loop with the weaker second RF signal. By limiting the AGC feedback signal in the control loop of the second channel to a maximum differential with respect to the AGC feedback signal in the control loop of the first channel, the weaker signal is not overly amplified thereby avoiding the undue amplification of noise in the second channel.Type: GrantFiled: March 7, 2003Date of Patent: November 29, 2005Assignee: ATI Technologies, Inc.Inventors: Christopher H Strolle, Anand M Shah, Thomas J Endres, Samir N Hulyalkar, Troy A Schaffer
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Patent number: 6937677Abstract: Original RF carriers are recovered for first and second channels in a diversity receiver and used to de-rotate (demodulate) each of the first and second received signals. The pilot loop filters of each channel are cross coupled to create a joint pilot loop between both channels. The channel with the stronger signal provides a dominant influence on the frequency of the synthesized recovered RF carrier in the channel with the weaker signal. The phase locked pilot loops in both channels will tend to be frequency locked to the frequency of the stronger signal, leaving the respective phase locked pilot loops to make an individual phase adjustment for each channel.Type: GrantFiled: April 9, 2003Date of Patent: August 30, 2005Assignee: ATI Technologies Inc.Inventors: Christopher H Strolle, Anand M Shah, Thomas J Endres, Samir N Hulyalkar, Troy A Schaffer
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Patent number: 6870892Abstract: First and second RF signals in the respective first and second channels of a multiple channel diversity receiver are processed jointly in a joint timing loop filter for baud clock recovery. The channel with the stronger signal determines the frequency of the baud clock for the channel with the weaker signal, leaving the respective PLL's to make individual phase adjustments for each channel. The first and second channels also share a skew corrector for baud clock recovery when the multipath delay between the first and second RF signals is greater than one whole baud clock period. The whole baud skew corrector computes the correlation between the first and second received signals, and if the correlation is low, shifts the first and second signals by one whole baud and recomputes the correlation. The process of shifting the first and second received signals and computing the correlation function is repeated for various whole baud shifts in accordance with a search strategy to find the best (highest) correlation.Type: GrantFiled: April 9, 2003Date of Patent: March 22, 2005Assignee: ATI Technologies, Inc.Inventors: Christopher H Strolle, Anand M Shah, Thomas J Endres, Samir N Hulyalkar, Troy A Schaffer
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Publication number: 20040063413Abstract: An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error terms to determine a desired adjustment to the total gain and a desired adjustment to the distribution of the gain between the wide-band VGA and the narrow-band VGA. The AGC circuit also minimizes the noise figure of the narrow-band VGA subject to linearity constraints.Type: ApplicationFiled: September 24, 2002Publication date: April 1, 2004Inventors: Troy A. Schaffer, Samir N. Hulyalkar, Anand M. Shah
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Patent number: 6668014Abstract: A digital communication receiver includes a blind equalizer using the Constant Modulus Algorithm (CMA) to compensate for channel transmission distortion in digital communication systems. Improved CMA performance is obtained by using a partial trellis decoder to predict 1 bit or 2 bits of the corresponding 3-bit transmitted symbol. The predicted bits from the partial trellis decoder are used to reduce the effective number of symbols in the source alphabet, which reduces steady state jitter of the CMA algorithm. Specifically, the received input signal to the CMA error calculation is shifted up or down by a computed delta (&Dgr;), in accordance with the predicted bit(s). In addition, a different constant gamma (&ggr;), for the CMA error calculation is selected in accordance with the predicted bit(s).Type: GrantFiled: December 9, 1999Date of Patent: December 23, 2003Assignee: ATI Technologies Inc.Inventors: Thomas J Endres, Samir N Hulyalkar, Christopher H Strolle, Troy A Schaffer, Raul A Casas, Stephen L Biracree, Anand M Shah
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Publication number: 20030194031Abstract: A diversity receiver is coupled to a composite antenna having first and second antennas physically configured to provide one or more forms of diversity reception. The multiple channel diversity receiver includes first and second RF channels with joint signal processing. First and second RF signals are processed jointly in the multiple channel diversity receiver with respect to tuning, automatic gain control (AGC), baud clock recovery, RF carrier recovery and forward equalization. The multiple channels of the diversity receiver are linked or cross coupled to each other through respective joint processing circuitry. In particular, first and second RF tuners share a common local oscillator and a common AGC feedback loop. First and second front ends share a common baud timing loop and a common pilot carrier recovery loop. Finally, first and second diversity receiver channels share a common sparse equalization filter.Type: ApplicationFiled: April 9, 2003Publication date: October 16, 2003Inventors: Christopher H. Strolle, Anand M. Shah, Thomas J. Endres, Samir N. Hulyalkar, Troy A. Schaffer
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Publication number: 20030189995Abstract: A diversity receiver is coupled to a composite antenna having first and second antennas physically configured to provide one or more forms of diversity reception. The multiple channel diversity receiver includes first and second RF channels with joint signal processing. First and second RF signals are processed jointly in the multiple channel diversity receiver with respect to tuning, automatic gain control (AGC), baud clock recovery, RF carrier recovery and forward equalization. The multiple channels of the diversity receiver are linked or cross coupled to each other through respective joint processing circuitry. In particular, first and second RF tuners share a common local oscillator and a common AGC feedback loop. First and second front ends share a common baud timing loop and a common pilot carrier recovery loop. Finally, first and second diversity receiver channels share a common sparse equalization filter.Type: ApplicationFiled: April 9, 2003Publication date: October 9, 2003Inventors: Christopher H. Strolle, Anand M. Shah, Thomas J. Endres, Samir N. Hulyakar, Troy A. Schaffer
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Publication number: 20030152173Abstract: A diversity receiver is coupled to a composite antenna having first and second antennas physically configured to provide one or more forms of diversity reception. The multiple channel diversity receiver includes first and second RF channels with joint signal processing. First and second RF signals are processed jointly in the multiple channel diversity receiver with respect to tuning, automatic gain control (AGC), baud clock recovery, RF carrier recovery and forward equalization. The multiple channels of the diversity receiver are linked or cross coupled to each other through respective joint processing circuitry. In particular, first and second RF tuners share a common local oscillator and a common AGC feedback loop. First and second front ends share a common baud timing loop and a common pilot carrier recovery loop. Finally, first and second diversity receiver channels share a common sparse equalization filter.Type: ApplicationFiled: March 7, 2003Publication date: August 14, 2003Inventors: Christopher H. Strolle, Anand M. Shah, Thomas J. Endres, Samir N. Hulyalkar, Troy A. Schaffer
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Patent number: 6560299Abstract: A diversity receiver is coupled to a composite antenna having first and second antennas physically configured to provide one or more forms of diversity reception. The multiple channel diversity receiver includes first and second RF channels with joint signal processing. First and second RF signals are processed jointly in the multiple channel diversity receiver with respect to tuning, automatic gain control (AGC), baud clock recovery, RF carrier recovery and forward equalization. The multiple channels of the diversity receiver are linked or cross coupled to each other through respective joint processing circuitry. In particular, first and second RF tuners share a common local oscillator and a common AGC feedback loop. First and second front ends share a common baud timing loop and a common pilot carrier recovery loop. Finally, first and second diversity receiver channels share a common sparse equalization filter.Type: GrantFiled: July 30, 1999Date of Patent: May 6, 2003Inventors: Christopher H Strolle, Anand M Shah, Thomas J Endres, Samir N Hulyalkar, Troy A Schaffer