Abstract: Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100?p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Systems and methods for caching data from a plurality of virtual machines may comprise detecting, using a computer processor executing cache management software, initiation of migration of a cached virtual machine from a first virtualization platform to a second virtualization platform, disabling caching for the virtual machine on the first virtualization platform, detecting completion of the migration of the virtual machine to the second virtualization platform, and enabling caching for the virtual machine on the second virtualization platform.

Abstract: Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p)% of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: An embodiment of the invention provides an apparatus comprising: a hypervisor comprising a virtual caching appliance (VCA) and an intermediate multipathing module that interfaces with VCA; wherein the intermediate multipathing module is configured to pass an I/O request from a virtual machine to the VCA; and wherein the VCA is configured to determine if the I/O request is to be passed from the VCA to a solid state storage or if the I/O request is to be passed from the VCA to a hard disk storage. Another embodiment of the invention provides a method comprising: passing an I/O request from a virtual machine to a virtual caching appliance (VCA) in a hypervisor; and determining if the I/O request is to be passed from the VCA to a solid state storage or if the I/O request is to be passed from the VCA to a hard disk storage.

Abstract: In an embodiment of the invention, an apparatus comprises: a hard disk drive input/output (HDD I/O) optimizer configured to receive a primary input/output (I/O) operation stream for a given cylinder in a permanent storage device, configured to schedule a secondary input/output (I/O) operation stream that is pending on the same given cylinder or that is pending on an adjacent cylinder that is adjacent to the given cylinder, and configured to allocate free space from the same given cylinder or from the adjacent cylinder for the secondary I/O operation stream that is pending.

Abstract: Embodiments of the present disclosure provides a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provides a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Embodiments of the present disclosure provides a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provides a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100?p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: Embodiments of the present disclosure provides a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provides a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100?p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Abstract: In an embodiment of the invention, an apparatus comprises: a hard disk drive input/output (HDD I/O) optimizer configured to receive a primary input/output (I/O) operation stream for a given cylinder in a permanent storage device, configured to schedule a secondary input/output (I/O) operation stream that is pending on the same given cylinder or that is pending on an adjacent cylinder that is adjacent to the given cylinder, and configured to allocate free space from the same given cylinder or from the adjacent cylinder for the secondary I/O operation stream that is pending.

Abstract: Systems and methods for caching data from a plurality of virtual machines are disclosed. In one particular exemplary embodiment, the systems and methods may be realized as a method for caching data from a plurality of virtual machines. The method may comprise detecting, using a computer processor executing cache management software, initiation of migration of a cached virtual machine from a first virtualization platform to a second virtualization platform, disabling caching for the virtual machine on the first virtualization platform, detecting completion of the migration of the virtual machine to the second virtualization platform, and enabling caching for the virtual machine on the second virtualization platform.

Abstract: Systems and methods for caching data from a plurality of virtual machines are disclosed. In one particular exemplary embodiment, the systems and methods may be realized as a method for caching data from a plurality of virtual machines. The method may comprise detecting, using a computer processor executing cache management software, initiation of migration of a cached virtual machine from a first virtualization platform to a second virtualization platform, disabling caching for the virtual machine on the first virtualization platform, detecting completion of the migration of the virtual machine to the second virtualization platform, and enabling caching for the virtual machine on the second virtualization platform.