Patents by Inventor Anand Mohan

Anand Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230318022
    Abstract: A method comprises positioning a lithium containing secondary battery within a pouch defined by an enclosure, trimming the enclosure to form a plurality of flaps, attaching a first side flap and a second side flap of the plurality of flaps to the pouch by folding each of the first and second side flaps towards and into contact with the pouch, wherein a portion of the first side flap extends beyond the pouch to define a first tab and a portion of the second side flap extends beyond the pouch to define a second tab, attaching an end flap of the plurality of flaps to the pouch by folding the end flap towards and into contact with the pouch, and attaching the first tab and the second tab to the end flap by folding the first and second tabs towards and into contact with the end flap.
    Type: Application
    Filed: March 24, 2023
    Publication date: October 5, 2023
    Inventors: Aditya MANDALAM, James MOODY, Richard J. CONTRERAS, Kim Han LEE, Robert S. Busacca, Claire KO, Anand Mohan YADAV
  • Publication number: 20230151122
    Abstract: The present invention discloses a process for polymerizing fluoromonomers in an aqueous medium to form a fluoropolymer, said process comprising the steps of: (a) forming an aqueous solution comprising a first surfactant combination of at least one fluorinated surfactant and at least one non-10 fluorinated surfactant in a polymerization reactor; (b) pressurizing the polymerization reactor with said fluoromonomers; (c) initiating a polymerization reaction of said fluoromonomers to form said fluoropolymer; (d) propagation of said polymerization reaction, wherein a second surfactant combination of at least one fluorinated surfactant and at least one non-fluorinated surfactant is 15 metered or one shot dosed into the polymerization reactor; and (e) termination of said polymerization reaction after consumption of a desired quantity of said fluoromonomers.
    Type: Application
    Filed: May 14, 2021
    Publication date: May 18, 2023
    Applicant: GUJARAT FLUOROCHEMICALS LIMITED
    Inventors: Rajeev CHAUHAN, Gaurav KUMAR, P.S. RAO, Navin SONI, B.S. BHATTACHARYA, Anamika DUTTA, Anand Mohan PATEL
  • Publication number: 20220372179
    Abstract: The present invention relates to a process for preparing fluoropolymers or fluoroelastomers in an aqueous medium using a non fluorinated sulfonate type hydrocarbon containing surfactant, said process comprising the steps of: (a) forming an aqueous solution comprising an non-fluorinated, hydrocarbon containing, sulfonate anionic type surfactant in a polymerization reactor; (b) pressurizing the reactor with fluoromonomers to form an aqueous emulsion; (c) initiating polymerization of said fluoromonomers; and (d) Propagating the reaction (e) Terminating the reaction after consumption of desired weight of fluoromonomers; wherein the non-fluorinated, hydrocarbon containing, sulfonate type surfactant comprises 18 to 36 carbon atoms, wherein the molecular weight of the fluoropolymer ranges from 1×103 to 9×108 g/mol and wherein said process is devoid of passivating the surfactant.
    Type: Application
    Filed: October 12, 2020
    Publication date: November 24, 2022
    Applicant: GUJARAT FLUOROCHEMICALS LIMITED
    Inventors: Rajeev CHAUHAN, Gaurav KUMAR, P.s. RAO, Navin SONI, B.s. BHATTACHARYA, Anamika DUTTA, Akanksha SHUKLA, Anand Mohan PATEL
  • Patent number: 11443847
    Abstract: A system and method determines efficiency data of a technician performing a Medical Data Acquisition Procedure (MDAP), using a Medical Data Acquisition System (MDAS). The method includes receiving timing data including Digital Imaging and Communications in Medicine (DICOM) metadata obtained during the MDAP by the MDAS. The DICOM metadata includes time duration information relating to each of a plurality of stages of the MDAP. The method includes determining the efficiency data of the technician as a function of the timing data and predetermined efficiency data defined for the MDAP using the MDAS.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: September 13, 2022
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Henrik Johansson, Ram Balasubramanian, Anand Mohan Tumuluri, Yogesh Pandit, Ashish Patel
  • Patent number: 10951176
    Abstract: A transconductance circuit comprises a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device. The gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device. The gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device. The source node of the first transistor is coupled to a reference voltage via the first source-degeneration device. The source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: March 16, 2021
    Inventors: Anand Mohan Pappu, Ranjit Kumar Guntreddi, Madhusudan Govindarajan, Pranjal Pandey
  • Patent number: 10727861
    Abstract: An analog-to-digital convertor circuit converts the output of a loop filter circuit to a digital signal. A random sequence generation circuit generates a random sequence. Adder circuitry adds the random sequence to the digital signal to generate a randomized digital signal. Noise transfer function impulse response detection circuitry processes the randomized digital signal and the random sequence to determine a noise transfer function impulse response. Loop filter configuration circuitry configures the loop filter circuit based on the noise transfer function impulse response. The random sequence generation circuit may comprises a high-pass sigma delta modulator. The noise transfer function impulse response detection circuitry may determine the noise transfer function impulse response, and the loop filter configuration circuitry may configure the loop filter based on the noise transfer function impulse response.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: July 28, 2020
    Assignee: MaxLinear, Inc.
    Inventors: Chandrajit Debnath, Abhishek Ghosh, Rishi Mathur, Anand Mohan Pappu
  • Patent number: 10615815
    Abstract: An analog-to-digital converter circuit comprises code-shuffling circuitry, a plurality of digital-to-analog converter circuits, a plurality of difference circuits, and a plurality of latch circuits. The code-shuffling circuitry is operable to shuffle a plurality of digital codes among a plurality of its outputs. The plurality of digital-to-analog converter circuits are operable to convert a digital code on the respective one of the outputs to a corresponding one of a plurality of analog reference voltages. The plurality of difference circuits is operable to generate a respective one of a plurality of difference signals corresponding to a difference between an input voltage and a respective one of the plurality of reference voltages. The plurality of latch circuits is operable to latch a respective one of the plurality of difference signals to a corresponding one of a plurality of digital values.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: April 7, 2020
    Assignee: MAXLINEAR, INC.
    Inventors: Rishi Mathur, Chandrajit Debnath, Abhishek Ghosh, Anand Mohan Pappu
  • Publication number: 20190379390
    Abstract: An analog-to-digital convertor circuit converts the output of a loop filter circuit to a digital signal. A random sequence generation circuit generates a random sequence. Adder circuitry adds the random sequence to the digital signal to generate a randomized digital signal. Noise transfer function impulse response detection circuitry processes the randomized digital signal and the random sequence to determine a noise transfer function impulse response. Loop filter configuration circuitry configures the loop filter circuit based on the noise transfer function impulse response. The random sequence generation circuit may comprises a high-pass sigma delta modulator. The noise transfer function impulse response detection circuitry may determine the noise transfer function impulse response, and the loop filter configuration circuitry may configure the loop filter based on the noise transfer function impulse response.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 12, 2019
    Inventors: Chandrajit Debnath, Abhishek Ghosh, Rishi Mathur, Anand Mohan Pappu
  • Publication number: 20190341926
    Abstract: An analog-to-digital converter circuit comprises code-shuffling circuitry, a plurality of digital-to-analog converter circuits, a plurality of difference circuits, and a plurality of latch circuits. The code-shuffling circuitry is operable to shuffle a plurality of digital codes among a plurality of its outputs. The plurality of digital-to-analog converter circuits are operable to convert a digital code on the respective one of the outputs to a corresponding one of a plurality of analog reference voltages. The plurality of difference circuits is operable to generate a respective one of a plurality of difference signals corresponding to a difference between an input voltage and a respective one of the plurality of reference voltages. The plurality of latch circuits is operable to latch a respective one of the plurality of difference signals to a corresponding one of a plurality of digital values.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 7, 2019
    Inventors: Rishi Mathur, Chandrajit Debnath, Abhishek Ghosh, Anand Mohan Pappu
  • Publication number: 20190341892
    Abstract: A transconductance circuit comprises a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device. The gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device. The gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device. The source node of the first transistor is coupled to a reference voltage via the first source-degeneration device. The source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.
    Type: Application
    Filed: May 1, 2019
    Publication date: November 7, 2019
    Inventors: Anand Mohan Pappu, Ranjit Kumar Guntreddi, Madhusudan Govindarajan, Pranjal Pandey, Prasenjit Bhowmik
  • Publication number: 20170323054
    Abstract: A system and method determines efficiency data of a technician performing a Medical Data Acquisition Procedure (MDAP), using a Medical Data Acquisition System (MDAS). The method includes receiving timing data including Digital Imaging and Communications in Medicine (DICOM) metadata obtained during the MDAP by the MDAS. The DICOM metadata includes time duration information relating to each of a plurality of stages of the MDAP. The method includes determining the efficiency data of the technician as a function of the timing data and predetermined efficiency data defined for the MDAP using the MDAS.
    Type: Application
    Filed: November 25, 2015
    Publication date: November 9, 2017
    Inventors: HENRIK JOHANSSON, RAM BALASUBRAMANIAN, ANAND MOHAN TUMULURI, YOGESH PANDIT, ASHISH PATEL
  • Publication number: 20170154243
    Abstract: Techniques are provided for adaptive selection of feature keypoints of an image. An example system may include a contrast statistics calculation circuit configured to generate contrast measurements of regions of the image associated with each of the feature keypoints, and to calculate a mean and variance of the contrast measurements. The system may also include an edge statistics calculation circuit configured to generate ratios of principal curvatures of regions of the image associated with each of the feature keypoints, and to calculate a mean and variance of the ratios of principal curvatures. The system may further include a threshold calculation circuit configured to calculate thresholds based on the mean and variance of the contrast measurements and on the mean and variance of the ratios of principal curvatures; and a keypoint filter circuit configured to filter the set of feature keypoints based on the those thresholds.
    Type: Application
    Filed: December 1, 2015
    Publication date: June 1, 2017
    Applicant: INTEL CORPORATION
    Inventors: TALAT ANAND MOHAN KALYANASUNDARAM, KOBA NATROSHVILI
  • Patent number: 9659234
    Abstract: Techniques are provided for adaptive selection of feature keypoints of an image. An example system may include a contrast statistics calculation circuit configured to generate contrast measurements of regions of the image associated with each of the feature keypoints, and to calculate a mean and variance of the contrast measurements. The system may also include an edge statistics calculation circuit configured to generate ratios of principal curvatures of regions of the image associated with each of the feature keypoints, and to calculate a mean and variance of the ratios of principal curvatures. The system may further include a threshold calculation circuit configured to calculate thresholds based on the mean and variance of the contrast measurements and on the mean and variance of the ratios of principal curvatures; and a keypoint filter circuit configured to filter the set of feature keypoints based on the those thresholds.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: May 23, 2017
    Assignee: Intel Corporation
    Inventors: Talat Anand Mohan Kalyanasundaram, Koba Natroshvili
  • Patent number: 8648646
    Abstract: An electrical system for generating arbitrary voltage waveform includes a power supply unit for providing a supply voltage to the electrical system. One or more charge pumps are in electrical communication with the power supply unit. Each charge pump generates a voltage. The electrical system also includes a plurality of switches, a first switch among the plurality of switches coupled between a ground and an output terminal, other switches among the plurality of switches coupled between the one or more charge pumps and the output terminal. A control circuit is in electrical communication with the power supply unit, the plurality of switches and the one or more charge pumps, and is operable to control the voltage generated by the each charge pump and the plurality of switches. Voltages from the one or more charge pumps additively result in a variable output voltage that generates an arbitrary voltage waveform.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 11, 2014
    Inventors: Anand Mohan, Sumeet Mathur
  • Publication number: 20130127522
    Abstract: An electrical system for generating arbitrary voltage waveform includes a power supply unit for providing a supply voltage to the electrical system. One or more charge pumps are in electrical communication with the power supply unit. Each charge pump generates a voltage. The electrical system also includes a plurality of switches, a first switch among the plurality of switches coupled between a ground and an output terminal, other switches among the plurality of switches coupled between the one or more charge pumps and the output terminal. A control circuit is in electrical communication with the power supply unit, the plurality of switches and the one or more charge pumps, and is operable to control the voltage generated by the each charge pump and the plurality of switches. Voltages from the one or more charge pumps additively result in a variable output voltage that generates an arbitrary voltage waveform.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: Cosmic Circuits Private Limited
    Inventors: Anand Mohan, Sumeet Mathur
  • Patent number: 8198316
    Abstract: The present invention relates to resolution of (cis,trans)5,6-dihydro-4H-4-ethylamino-6-methylthieno[2,3-b]thiopyran-2-sulfonamide-7,7-dioxide using dibenzoyl-L-tartaric acid monohydrate or di-p-toluoyl-L-tarrtaric acid monohydrate as a chiral resolving agent in presence of methanol to obtain hemitartarate salt, purifying it to obtain hemitartarate salt of 5,6-dihydro-4H-4(S)-ethylamino-6(S)methylthieno[2,3-b]thiopyran-2-sulfonamide-7,7-dioxide with de of >99%, Chemical purity >99.5% with cis isomer content of <0.1% and further converting into its pharmaceutically acceptable salts, preferably hydrochloride salt.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: June 12, 2012
    Assignee: FDC Ltd
    Inventors: Anand Mohan Chandavarkar, Rajaram Uday Bapat, Anand Atul Bade, Anand Pandurang Chavan
  • Publication number: 20090264662
    Abstract: The present invention relates to resolution of (cis, trans) 5,6-dihydro-4H-4-ethylamino-6-methylthieno[2,3-b] thiopyran-2-sulfonamide-7,7-dioxide using dibenzoyl-L-tartaric acid monohydrate or di-p-toluoyl-L-tarrtaric acid monohydrate as a chiral resolving agent in presence of methanol to obtain hemitartarate salt, purifying it to obtain hemitartarate salt of 5,6-dihydro-4 H-4 (S)-ethyl amino-6(S) methylthieno [2,3-b] thiopyran-2-sulfonamide-7,7-dioxide with de of >99% , Chemical purity >99.5% with cis isomer content of <0.1% and further converting into its pharmaceutically acceptable salts, preferably hydrochloride salt.
    Type: Application
    Filed: July 6, 2005
    Publication date: October 22, 2009
    Applicant: FDC LTD
    Inventors: Anand Mohan Chandavarkar, Rajaram Uday Bapat, Anand Atul Bade, Anand Pandurang Chavan
  • Patent number: 4397715
    Abstract: In a process of manufacturing screen material a metal matrix is subjected to an electrolytic metal deposition by using an electrolytic bath containing a brightener, the liquid of the bath being forced to flow through apertures in the cathode toward the anode. The metal deposits grow substantially perpendicular to the lands of the matrix and so form a screen having apertures of approximately the same size as the apertures of the original matrix. The screen can be removed from the matrix by previously coating the latter with a separating agent such as beeswax.An installation for performing the process of the invention comprises a perforated cathode as matrix being fixed to cathode fixing means, a perforated anode being fixed to anode fixing means and a pump for providing a forced flow of liquid through the apertures of the cathode toward the anode.
    Type: Grant
    Filed: September 28, 1981
    Date of Patent: August 9, 1983
    Inventors: Anand Mohan, Johan A. de Hek
  • Patent number: 4383896
    Abstract: Metal screen comprising ribs and apertures and process of electrolytically forming a metal screen by forming in a first electrolytic bath a screen skeleton upon a matrix provided with a separating agent, such as beeswax, stripping the formed screen skeleton from the matrix and subjecting the screen skeleton to an electrolysis in a second electrolytic bath in order to deposit metal onto said skeleton. The second electrolytic bath contains an organic compound having at least one unsaturated bond not belonging to a ##STR1## group. Preferred organic compounds are a butyne diol or an ethylene cyanohydrin. The screen is preferably a cylindrical screen.
    Type: Grant
    Filed: April 15, 1981
    Date of Patent: May 17, 1983
    Assignee: Stork Screens B.V.
    Inventors: Wilhelmus A. Pruyn, Anand Mohan