Patents by Inventor Anand Prithivathi

Anand Prithivathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7474979
    Abstract: A method for integrated device testing can include the steps of: receiving wafer test data that identifies wafer test failures with the dice tested while part of a shared common substrate; receiving package test data that identifies test failures for at least a subset of the dice after the dice have been separated and assembled into different packages; identifying non-unique coverage test sets that include at least one wafer test or package test that generates failures that correlates with failures generated by another wafer test or package test for the same dice; and identifying unique coverage tests that include failures generated by wafer tests or package tests that do not correlate with failures generated by any other another wafer test or package test for the same dice.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: January 6, 2009
    Assignee: Cypress Semiconductor Corporation
    Inventors: Lance Stevens, Virgilio Velasco, Anand Prithivathi, Anthony Schmitz