Abstract: A system for adaptive audio video (AV) stream processing may include at least one processor and a switch device. The switch device may be configured to route AV traffic to the processor, and to receive AV traffic from the processor and provide the AV traffic to a client device via one or more channels. The processor may monitor a transcoder buffer depth and depths of buffers associated with channels over which the AV traffic is being transmitted. The processor may adaptively modify one or more attributes associated with the AV traffic based at least on the monitored buffer depths. For example, the processor may adaptively adjust a bit rate associated with transcoding the AV traffic based at least on the transcoder buffer depth. The processor may utilize the depths of the buffers associated with the channels to adaptively adjust the amount of AV traffic provided for transmission over the channels.

Abstract: A system for recovering channel bonded program streams may include filters and a collator. The filters may be configured to receive data streams that include multiple chunks of transport stream packets, and marker information items that are indicative of boundaries of the chunks, over multiple bonded channels, and to individually filter the data streams based at least on a utilized program identifier. The collator may be configured to collate the filtered data streams based at least on the marker information items to recover a program stream corresponding to the utilized program identifier. In one or more implementations, the filters may replace, or augment, the marker information items with marker packets that include a program identifier that is not being used for transmitted programs and/or that is reserved for marker packets. The collator may collate the filtered data streams based at least on the marker packets.

Abstract: A system for adaptive audio video (AV) stream processing may include at least one processor and a switch device. The switch device may be configured to route AV traffic to the processor, and to receive AV traffic from the processor and provide the AV traffic to a client device via one or more channels. The processor may monitor a transcoder buffer depth and depths of buffers associated with channels over which the AV traffic is being transmitted. The processor may adaptively modify one or more attributes associated with the AV traffic based at least on the monitored buffer depths. For example, the processor may adaptively adjust a bit rate associated with transcoding the AV traffic based at least on the transcoder buffer depth. The processor may utilize the depths of the buffers associated with the channels to adaptively adjust the amount of AV traffic provided for transmission over the channels.

Abstract: A system for efficient memory bandwidth utilization may include a depacketizer, a packetizer, and a processor core. The depacketizer may generate header information items from received packets, where the header information items include sufficient information for the processor core to process the packets without accessing the payloads from off-chip memory. The depacketizer may accumulate multiple payloads and may write the multiple payloads to the off-chip memory in a single memory transaction when a threshold amount of the payloads have been accumulated. The processor core may receive the header information items and may generate a single descriptor for accessing multiple payloads corresponding to the header information items from the off-chip memory. The packetizer may generate a header for each payload based at least on on-chip information and without accessing off-chip memory. Thus, the subject system provides efficient memory bandwidth utilization, e.g.

Abstract: A system for pipelined encryption and packetization of audio video (AV) data may consecutively encrypt a number of AV data units based on a security mechanism, associate the encrypted AV data units with a security header, where the security header is generated before the AV data units are encrypted, and the security header includes information related to the security mechanism, generate network packets for transporting the encrypted AV data units and the associated security header based at least in part on an order in which the AV data units are encrypted, where one or more of the network packets is generated contemporaneous with encrypting one or more of the AV data units, and provide the network packets for transport to a client device as the packets are generated, where the AV data units are encrypted and the network packets are generated without accessing memory external to the system.

Abstract: A system for lossless switching of traffic in a network device may be implemented when a network switch is integrated into a gateway device, or with any other data source. A processor of the gateway device may receive queue depth information for queues of the network switch. The processor may prevent data from being transmitted to congested queues of the network switch, while allowing data to be transmitted to uncongested queues. In this manner, data loss can be avoided through the network switch for data sourced from the gateway device, such as audio-video data retrieved from a hard drive, audio-video data received from a tuner, etc. Furthermore, re-transmission at higher layers can be reduced. Since the subject system observes congestion for each individual queue, only traffic destined to that particular, congested, queue is affected, e.g. paused. Traffic to non-congested queues is not affected, regardless of traffic class or egress port.

Abstract: A device for decoupling audio-video (AV) traffic processing from non-AV traffic processing may include a first processor and a second processor. The first processor may be configured to establish a network connection with a client device, determine whether the network connection is associated with AV traffic, transfer the network connection to a second processor when the network connection is associated with AV traffic, and process non-AV traffic associated with the network connection when the network connection is not associated with AV traffic. The second processor may be configured to receive the network connection from the first processor and process the AV traffic associated with the network connection.

Abstract: A method includes receiving data stream packets on respective ones of data channels. The data stream packets of each respective data channel contain an input data stream. The method includes storing the data stream packets for each of the data channels in one or more packet buffers associated with the respective data channel. For each of the data channels, the method includes determining if a timing maturity event of a corresponding input data stream has occurred. The method includes outputting one or more of the stored data stream packets from the packet buffers associated with the respective data channel to generate a transmission packet if the timing maturity event of the corresponding input data stream has occurred. The stored data stream packets for generating consecutive transmissions packets may be output at a data rate based on a distance between timing maturity event occurrences of the corresponding input data stream.

Abstract: A method of handling retransmission and memory consumption tracking of data packets includes storing data packets from different data channels in respective transmitter ring buffers allocated to the data channels when the data packets are not marked for retransmission, and facilitating retransmission of data packets from a specified ring buffer corresponding to a retransmission sequence number. The method also may include storing received data packets out of sequence in respective receiver ring buffers, marking a descriptor indicating a tail location of the stored data packets, and reclaiming memory space in the ring buffer based on the marked descriptor. The method may include storing a payload address associated with received data packets, marking a descriptor associated with the payload address to indicate the stored data packets have been consumed for processing, and reclaiming memory space when a register contains an indication of the stored payload address based on the marked descriptor.

Abstract: A transponder-bonded receiver system with clock recovery may include memory an and one or more processors coupled to the memory and configured to execute one or more program modules to perform: receiving multiple data streams each including a number of data packets, and a number of marker packets with embedded bonding clock references (BCRs) and including marker packet information; adjusting arrival-time-stamps (ATSs) of the marker packets by using the BCRs and including capturing timing between the marker packets based on a local free running counter of the receiver; and determining an adjusted ATS corresponding to an ATS at the receiver for each of the plurality of packets using the ATS and a delta-ATS.

Abstract: Different data communication architectures deliver a wide variety of content, including audio and video content, to consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, the communication architectures distribute video programming in the form of MPEG2 TS packets, flagged by marker packets, in a round-robin manner across the communication channels. Channel bonding synchronization information may be present in packets defined above the data-link layer or added to fields within data-link layer frames.

Abstract: Different data communication architectures deliver a wide variety of content, including audio and video content, to consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, the communication architectures distribute video programming in the form of MPEG2 TS packets, flagged by marker packets, in a round-robin manner across the communication channels. Channel bonding synchronization information may be present in packets defined above the data-link layer or added to fields within data-link layer frames.

Abstract: Different data communication architectures deliver a wide variety of content, including audio and video content, to consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, channel bonding may be used to bond channels with mixed serial and parallel streams.

Abstract: Different data communication architectures deliver a wide variety of content, including audio and video content, to consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, the communication architectures distribute video programming in the form of MPEG2 TS packets, flagged by marker packets, in a round-robin manner across the communication channels. Channel bonding synchronization information may be present in packets defined above the data-link layer or added to fields within data-link layer frames.

Abstract: Different data communication architectures deliver a wide variety of content, including audio and video content, to consumers. The architectures employ channel bonding to deliver more bandwidth than any single communication channel can carry. In some implementations, the communication architectures distribute video programming in the form of MPEG2 TS packets, flagged by marker packets, in a round-robin manner across the communication channels. Channel bonding synchronization information may be present in packets defined above the data-link layer or added to fields within data-link layer frames.

Abstract: Presented herein are optimized single inverse quantization engines for a plurality of standards. In one embodiment, there is presented a system for inverse quantizing quantized frequency coefficients. The system comprises an inverse quantizer for inverse quantizing video data encoded in accordance with a first encoding standard and for inverse quantizing video data encoded in accordance with a second encoding standard. In another embodiment, there is presented a decoder for decoding video data. The decoder comprises an inverse quantizer operable to inverse quantize video data encoded in accordance with a first encoding standard and for inverse quantizing video data encoded in accordance with a second encoding standard.

Abstract: Presented herein are system(s), and method(s) for inverse quantizing data from a plurality of standards. In one embodiment, there is presented a system for decoding data. The system comprises a host processor and an inverse quantizer. The host processor provides inverse quantization parameters from a first standard and from a second standard that are transcoded to a particular format. The inverse quantizer receives the transcoded quantization parameters in the particular format and inverse quantizes quantized data quantized in accordance with the first standard and the second standard based on the transcoded quantization parameters.

Abstract: Presented herein are systems, methods, and apparatus for DC coefficient transformations. In one embodiment, there is presented a circuit for transforming a data matrix. The circuit comprises a controller and a plurality of stages. The controller fetches a row or column of elements from the data matrix. The plurality stages are associated with a plurality of elements in a product matrix and add or subtract each element of the row or column of elements to a plurality of running totals, wherein each of the plurality of elements in the product matrix are a function of the element.

Abstract: Presented herein are system(s), method(s), and apparatus for DC coefficient prediction. In one embodiment, there is presented a method for predicting coefficients for a macroblock. The method comprises providing at least one coefficient prediction direction for at least one neighboring block of a particular block for predicting AC coefficients of the particular block; predicting a DC coefficient for the particular block; and overwriting a DC coefficient for a neighboring block of the particular block.

Abstract: Presented herein are system(s), method(s), and apparatus for AC coefficient prediction. In one embodiment, there is presented a method for predicting AC coefficients for a macroblock. The method comprises determining whether a particular block is predicted from a top neighboring block or a left neighboring block; retrieving from a buffer, data from the top neighboring block or left neighboring block from which the particular block is predicted; and writing data from the particular block to the buffer.