Patents by Inventor Anand VEERAVALLI RAGHUPATHY

Anand VEERAVALLI RAGHUPATHY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11435767
    Abstract: A voltage regulation loop includes a voltage reference generation block that includes a bandgap voltage reference circuit; a linear voltage regulator block that includes a first and second linear voltage regulators, wherein the first linear voltage regulator provides a first regulated power supply to the bandgap voltage reference circuit in the voltage reference generation block, and the second linear voltage regulator provides a second regulated power supply to a load; and a soft startup circuit connected between the voltage reference generation block and the linear voltage regulator block, wherein a selector functions with a control block to output a selected voltage reference to pass to the soft startup circuit, wherein the soft startup circuit smooths the selected voltage reference and produces a smoothed voltage reference to pass to the linear voltage regulator block to prevent overshoots at startup.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 6, 2022
    Assignee: Vidatronic, Inc.
    Inventors: Bishoy Milad Helmy Zaky, Anand Veeravalli Raghupathy
  • Publication number: 20220247393
    Abstract: An apparatus includes a poly current generator circuit, which includes a fractional bandgap circuit, or a bandgap voltage reference circuit and a current reference generator, an adaptive bias current generator, a frequency generator to generate an output clock signal having a select frequency, wherein the frequency generator includes a current starved ring oscillator that comprises n identical cascaded stages connected in a shape of a ring, wherein an output of the nth cascaded stage is fed back as an input of the first cascaded stage, wherein n is an odd number greater than or equal to 3; and clock buffers configured to buffer the output clock signal generated by the frequency generator for distribution.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Applicant: Vidatronic, Inc.
    Inventors: Bishoy Milad HELMY ZAKY, Sameh Ahmed Assem IBRAHIM, Hazem Hassan Mohamed HAMMAM, Anand VEERAVALLI RAGHUPATHY, Moises Emanuel ROBINSON
  • Publication number: 20210286394
    Abstract: A current reference circuit with one or more current mirror devices having dynamic body biasing includes a voltage-to-current converter circuit having a feedback loop that includes an operational amplifier, an NMOS device, and a resistor to generate a reference current; a current mirror circuit, including one or more current mirror devices with source degeneration, to produce one or more output currents that are copies of the reference current; and a body-biasing stage including an active N-well to dynamically set a body-biasing voltage for the one or more current mirror devices.
    Type: Application
    Filed: March 14, 2020
    Publication date: September 16, 2021
    Applicant: Vidatronic, Inc.
    Inventors: Mohammad Ahmed RADWAN, Anand Veeravalli RAGHUPATHY, Michael A NIX
  • Publication number: 20200401167
    Abstract: A voltage regulation loop includes a voltage reference generation block that includes a bandgap voltage reference circuit; a linear voltage regulator block that includes a first and second linear voltage regulators, wherein the first linear voltage regulator provides a first regulated power supply to the bandgap voltage reference circuit in the voltage reference generation block, and the second linear voltage regulator provides a second regulated power supply to a load; and a soft startup circuit connected between the voltage reference generation block and the linear voltage regulator block, wherein a selector functions with a control block to output a selected voltage reference to pass to the soft startup circuit, wherein the soft startup circuit smooths the selected voltage reference and produces a smoothed voltage reference to pass to the linear voltage regulator block to prevent overshoots at startup.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 24, 2020
    Applicant: Vidatronic, Inc.
    Inventors: Bishoy Milad HELMY ZAKY, Anand Veeravalli Raghupathy
  • Patent number: 10771044
    Abstract: A system for processing of signals with poles that are low in frequency includes a switched capacitor circuit that includes two switches connected to an input and an output of a switching capacitor (Cs), respectively, in an alternating manner at a selected switching frequency (fSW); and a filter capacitor connected between an input and the switched capacitor circuit. The filter capacitor and the switched capacitor circuit together function as a filter, thereby a pole frequency depending on a ratio of capacitance of the switching capacitor (Cs) and the filter capacitor, instead of an RC product.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: September 8, 2020
    Assignee: Vidatronic, Inc.
    Inventor: Anand Veeravalli Raghupathy
  • Patent number: 10671109
    Abstract: A bandgap reference circuit includes a circuit for high-order temperature curvature compensation; and a circuit for low output impedance and current drive capability, wherein an output voltage of the bandgap reference circuit can be independently adjusted to be either above or below a silicon bandgap voltage without impacting temperature curvature.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: June 2, 2020
    Assignee: Vidatronic Inc.
    Inventors: Sameh Assem Ibrahim, Anand Veeravalli Raghupathy, Mostafa Mohamed Hesham Kamel Toubar, Moises Emanuel Robinson
  • Publication number: 20200125129
    Abstract: A bandgap reference circuit includes a circuit for high-order temperature curvature compensation; and a circuit for low output impedance and current drive capability, wherein an output voltage of the bandgap reference circuit can be independently adjusted to be either above or below a silicon bandgap voltage without impacting temperature curvature.
    Type: Application
    Filed: June 27, 2018
    Publication date: April 23, 2020
    Applicant: Vidatronic Inc.
    Inventors: Sameh Assem IBRAHIM, Anand VEERAVALLI RAGHUPATHY, Mostafa Mohamed Hesham Kamel TOUBAR, Moises Emanuel ROBINSON
  • Patent number: 10627846
    Abstract: A band-gap reference circuit includes a band-gap voltage reference core to provide a reference voltage; a low impedance block; three capacitors; two transmission gates to connect and disconnect the capacitors; and two digital control blocks. The three capacitors includes an output capacitor connected at an output of the low impedance block to ground; a small capacitor connected to an output of the band-gap voltage reference core; and a large capacitor connected to the two transmission gates. The band-gap voltage reference core includes an operational amplifier, wherein an output of the operational amplifier connects to an input of the low impedance block and the small capacitor, wherein the small capacitor is also connected to ground; and a combination of bipolar junction transistors, MOS-FET, resistors, capacitors, or FinFET devices that provides a reference voltage.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: April 21, 2020
    Assignee: Vidatronic, Inc.
    Inventors: Mostafa Mohamed Hesham Kamel Toubar, Anand Veeravalli Raghupathy, Sameh Ahmed Assem Ibrahim
  • Patent number: 10454468
    Abstract: A power-on reset (POR) circuit with an auxiliary control circuit and an enhanced resistor ladder for brownouts circuit detectors in low power applications includes a power-up detector circuit for detecting power supply ramp-up while charging; a brownout detector circuit for sensing power supply falling down; a set-reset (SR) latch to generate a power-on-reset (POR) signal; a start-up network; and an internal band-gap voltage reference circuit, wherein the internal band-gap voltage reference circuit is configured to be started by the start-up network to serve as a reference for the power-up detector circuit.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: October 22, 2019
    Assignee: Vidatronic, Inc.
    Inventors: Luis Angel Tellez Estrada, Anand Veeravalli Raghupathy
  • Patent number: 9899912
    Abstract: A charge pump driven Linear Voltage Regulator (LVR) system with a cascoded n-type output pass device includes an error amplifier; a voltage feedback network; a dynamically controlled charge pump block that is ON only when required and OFF otherwise; a gate drive system configured to ensure that the charge pump drives only gate of a cascode transistor and no DC or static current load such that a voltage is preserved for a duration; and a filter at the charge pump output to reduce an impact of the switching noise of the charge pump on the regulator output, wherein the filter is outside a main servo loop of the regulator, wherein an n-type pass element and/or cascode element in the cascoded n-type output pass device comprises at least one of a Metal Oxide Semiconductor (MOS) Field Effect Transistor (FET), a bipolar junction transistor, an LDMOS, or a FinFET device.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: February 20, 2018
    Assignee: Vidatronic, Inc.
    Inventor: Anand Veeravalli Raghupathy
  • Publication number: 20170063223
    Abstract: A charge pump driven Linear Voltage Regulator (LVR) system with a cascoded n-type output pass device includes an error amplifier; a voltage feedback network; a dynamically controlled charge pump block that is ON only when required and OFF otherwise; a gate drive system configured to ensure that the charge pump drives only gate of a cascode transistor and no DC or static current load such that a voltage is preserved for a duration; and a filter at the charge pump output toreduce an impact of the switching noise of the charge pump on the regulator output, wherein the filter is outside a main servo loop of the regulator, wherein an n-type pass element and/or cascode element in the cascoded n-type output pass device comprises at least one of a Metal Oxide Semiconductor (MOS) Field Effect Transistor (FET), a bipolar junction transistor, an LDMOS, or a FinFET device.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 2, 2017
    Applicant: Vidatronic Inc.
    Inventor: Anand VEERAVALLI RAGHUPATHY
  • Publication number: 20170063347
    Abstract: A system for processing of signals with poles that are low in frequency includes a switched capacitor circuit that includes two switches connected to an input and an output of a switching capacitor (Cs), respectively, in an alternating manner at a selected switching frequency (fSW); and a filter capacitor connected between an input and the switched capacitor circuit. The filter capacitor and the switched capacitor circuit together function as a filter, thereby a pole frequency depending on a ratio of capacitance of the switching capacitor (Cs) and the filter capacitor, instead of an RC product.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 2, 2017
    Applicant: Vidatronic Inc.
    Inventor: Anand VEERAVALLI RAGHUPATHY