Patents by Inventor Ananda Vithanage

Ananda Vithanage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7461111
    Abstract: A method of uniforming physical random numbers while concurrently maintaining a random number generating rate and ensuring security. The method sequentially inputs a plurality of physical random numbers to a shift register to hold them there, and shifts them every time a reference pulse signal rises. Physical random numbers held in the shift register are randomly selected and output by a selector based on part of them. Accordingly, physical random numbers input to the shift register are uniformed and then output even thought they have a deviation, thereby eliminating the chance of not outputting random numbers or letting others recognize the deviation of random numbers.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: December 2, 2008
    Assignee: FDK Corporation
    Inventors: Hiroyasu Yamamoto, Ananda Vithanage, Takakuni Shimizu, Kaoru Fujita, Hatsumi Nakano, Takaaki Shiga, Ryuji Soga, Masayoshi Katono, Toshiyuki Watanabe, Misako Koibuchi
  • Patent number: 7243117
    Abstract: A random number generator includes a flip-flop in which an output state (0 or 1) becomes definite according to a phase difference between signals inputted to two input units, a delay unit for producing the phase difference in these two input signals, and a feedback circuit for controlling the phase difference so that an occurrence ratio of 0 or 1 of an output from the flip-flop by the input signals is constant within a specified repetition cycle.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: July 10, 2007
    Assignee: FDK Corporation
    Inventors: Hiroyasu Yamamoto, Takakuni Shimizu, Ananda Vithanage, Misako Koibuchi, Ryuji Soga, Takaaki Shiga
  • Publication number: 20060040731
    Abstract: A method of uniforming physical random numbers, capable of maintaining a random number generating rate and ensuring security concurrently. The method sequentially inputs a plurality of physical random numbers to a shift register to hold them there, and shifts them every time a reference pulse signal rises. Physical random numbers held in the shift register are randomly selected and output by a selector based on part of them. Accordingly, physical random numbers input to the shift register are uniformed and then output even thought they have a deviation, thereby eliminating the chance of not outputting random numbers or letting others recognize the deviation of random numbers.
    Type: Application
    Filed: September 25, 2003
    Publication date: February 23, 2006
    Inventors: Hiroyasu Yamamoto, Ananda Vithanage, Takakuni Shimizu, Kaoru Fujita, Hatsumi Nakano, Takaaki Shiga, Ryuji Soga, Masayoshi Katono, Toshiyuki Watanabe, Misako Koibuchi
  • Publication number: 20050193045
    Abstract: A random number generator includes a flip-flop in which an output state (0 or 1) becomes definite according to a phase difference between signals inputted to two input units, a delay unit for producing the phase difference in these two input signals, and a feedback circuit for controlling the phase difference so that an occurrence ratio of 0 or 1 of an output from the flip-flop by the input signals is constant within a specified repetition cycle.
    Type: Application
    Filed: July 23, 2003
    Publication date: September 1, 2005
    Inventors: Hiroyasu Yamamoto, Takakuni Shimizu, Ananda Vithanage, Misako Koibuchi, Ryuji Soga, Takaaki Shiga