Patents by Inventor Anant KAMATH

Anant KAMATH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250139038
    Abstract: An example apparatus includes: a pullup circuit coupled to a first USB terminal; a first pulldown circuit coupled to the first USB terminal; a second pulldown circuit coupled to a second USB terminal; a third pulldown circuit coupled to a third USB terminal; a fourth pulldown circuit coupled to a fourth USB terminal; a high-speed termination detection circuit including: a current source including a first supply terminal and a second supply terminal, the first supply terminal coupled to the first USB terminal, the second supply terminal coupled to the second USB terminal; a first comparator including a first comparator terminal and a second comparator terminal, the first comparator terminal coupled to the first USB terminal; and a second comparator including a third comparator terminal and a fourth comparator terminal, the third comparator terminal coupled to the second USB terminal; and a controller including a first control terminal and a second control terminal, the first control terminal coupled to the sec
    Type: Application
    Filed: December 30, 2024
    Publication date: May 1, 2025
    Inventors: Anant Kamath, Suzanne M. Vining, Rakesh Hariharan, Mark Wentroble, Christopher Rodrigues, Prajwala P
  • Patent number: 12283894
    Abstract: In described examples, a converter circuit includes a primary-side ground, a current sensor, a control signal generator, first and second control switches, and a transformer with a center-tapped primary-side coil. A first terminal of the first control switch is coupled to a first terminal of the coil and a first input of the current sensor. A first terminal of the second control switch is coupled to a second terminal of the coil and a second input of the current sensor. Second terminals of the first and second control switches are coupled to ground. The control signal generator closes the first control switch and opens the second control switch in a first phase; opens the first control switch and closes the second control switch in a second phase that alternates with the first phase; and adjusts first phase duration in response to current sensor output, without changing converter period duration.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: April 22, 2025
    Assignee: Texas Instruments Incorporated
    Inventors: Anant Kamath, Suvadip Banerjee
  • Patent number: 12276992
    Abstract: A circuit includes a supply circuit having an input and an output. The supply circuit includes: a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the output of the supply circuit; a switch having a first terminal, a second terminal, and a control terminal, the first terminal of the switch coupled to the input of the supply circuit, the second terminal of the switch coupled to the output of the supply circuit; and a controller coupled to the control terminal of the switch. The controller is configured to: turn on the switch responsive to a first supply voltage level at the input of the supply circuit; and turn off the switch responsive to a second supply voltage level at the input of the supply circuit.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 15, 2025
    Assignee: Texas Instruments Incorporated
    Inventors: Tarunvir Singh, Shubham Panjrath, Anant Kamath
  • Publication number: 20250087583
    Abstract: A device includes first and second device terminals, a fuse, a first circuit, a first transistor, and a control circuit. The fuse terminal couples to the first device terminal. The first circuit couples to the second fuse terminal. The second fuse terminal has a first voltage. The first transistor has a first control input and first and second current terminals. The first current terminal couples to the second fuse terminal, and the second current terminal couples to the second device terminal. The control circuit: turns “on” the first transistor into a saturation region if the first voltage exceeds a threshold and a current through the fuse exceeds a trip threshold current of the fuse; and turns “on” the first transistor into a linear region if the first voltage exceeds a threshold and a current through the fuse is below the trip threshold current of the fuse.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 13, 2025
    Inventors: Ujwal RADHAKRISHNA, Vinod RAI, Yogesh RAMADASS, Anant KAMATH, Kashyap BAROT
  • Patent number: 12216602
    Abstract: An example apparatus includes: a pullup circuit coupled to a first USB terminal; a first pulldown circuit coupled to the first USB terminal; a second pulldown circuit coupled to a second USB terminal; a third pulldown circuit coupled to a third USB terminal; a fourth pulldown circuit coupled to a fourth USB terminal; a high-speed termination detection circuit including: a current source including a first supply terminal and a second supply terminal, the first supply terminal coupled to the first USB terminal, the second supply terminal coupled to the second USB terminal; a first comparator including a first comparator terminal and a second comparator terminal, the first comparator terminal coupled to the first USB terminal; and a second comparator including a third comparator terminal and a fourth comparator terminal, the third comparator terminal coupled to the second USB terminal; and a controller including a first control terminal and a second control terminal, the first control terminal coupled to the sec
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: February 4, 2025
    Assignee: Texas Instruments Incorporated
    Inventors: Anant Kamath, Suzanne M. Vining, Rakesh Hariharan, Mark Wentroble, Christopher Rodrigues, Prajwala P
  • Publication number: 20250030413
    Abstract: An integrated circuit is provided which comprises a transistor and a driver coupled to a gate of the transistor. In at least one example, the driver controls an operation of the transistor, wherein the driver is operable in a first configuration as a low-side gate driver for a voltage regulator, and wherein the transistor is operable in the first configuration as a low-side switch for the voltage regulator. In at least one example, the driver is operable in a second configuration as a high-side gate driver for the voltage regulator, and wherein the transistor is operable in the second configuration as a high-side switch for the voltage regulator.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 23, 2025
    Inventors: Anant Kamath, Taisuke Kazama, Sombuddha Chakraborty
  • Patent number: 12183672
    Abstract: A device includes first and second device terminals, a fuse, a first circuit, a first transistor, and a control circuit. The fuse terminal couples to the first device terminal. The first circuit couples to the second fuse terminal. The second fuse terminal has a first voltage. The first transistor has a first control input and first and second current terminals. The first current terminal couples to the second fuse terminal, and the second current terminal couples to the second device terminal. The control circuit: turns “on” the first transistor into a saturation region if the first voltage exceeds a threshold and a current through the fuse exceeds a trip threshold current of the fuse; and turns “on” the first transistor into a linear region if the first voltage exceeds a threshold and a current through the fuse is below the trip threshold current of the fuse.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: December 31, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Ujwal Radhakrishna, Vinod Rai, Yogesh Ramadass, Anant Kamath, Kashyap Barot
  • Patent number: 12160169
    Abstract: Circuits and systems include a parallel resistor-capacitor (RC) network coupled between a pin and ground, and first and second transistors coupled in source follower configuration with a common gate coupling. The source of the first transistor is coupled to the pin. A first switch couples a drain of the first transistor to the common gate coupling during soft-start (SS) and decouples that connection during over current limit (OCL) sensing, and a second switch couples a drain of the second transistor to the common gate coupling during OCL sensing and decouples that connection during SS. A first current source is enabled deliver a constant current to the pin during SS. A second current source is enabled to generate a reference voltage at the source of the second transistor during OCL, which reference voltage is transferred to the pin by the source follower configuration. A comparator controls the switches to transition from SS to OCL sensing.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: December 3, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Anandha Ruban Tiruchengode Tirumurugga Bupathi, Suvadip Banerjee, Anant Kamath
  • Publication number: 20240361789
    Abstract: A circuit includes a supply circuit having an input and an output. The supply circuit includes: a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the output of the supply circuit; a switch having a first terminal, a second terminal, and a control terminal, the first terminal of the switch coupled to the input of the supply circuit, the second terminal of the switch coupled to the output of the supply circuit; and a controller coupled to the control terminal of the switch. The controller is configured to: turn on the switch responsive to a first supply voltage level at the input of the supply circuit; and turn off the switch responsive to a second supply voltage level at the input of the supply circuit.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Inventors: Tarunvir SINGH, Shubham PANJRATH, Anant KAMATH
  • Publication number: 20240235504
    Abstract: A system includes an operational amplifier which includes a first amplifier input, a second amplifier input and an amplifier output. The system includes a first switch which includes a first terminal and includes a second terminal coupled to the first amplifier input. The system includes a second switch which includes a first terminal coupled to the first amplifier input and a second terminal coupled to the second amplifier input. The system includes a first bias current source coupled between the first amplifier input and a common potential and includes a second bias current source coupled between the first terminal of the first switch and the common potential. The system includes a feedback path between the amplifier output and the first amplifier input.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventors: Harsh Sheokand, Tarunvir Singh, Anant Kamath, Suvadip Banerjee
  • Publication number: 20240235422
    Abstract: In described examples, a converter circuit includes a primary-side ground, a current sensor, a control signal generator, first and second control switches, and a transformer with a center-tapped primary-side coil. A first terminal of the first control switch is coupled to a first terminal of the coil and a first input of the current sensor. A first terminal of the second control switch is coupled to a second terminal of the coil and a second input of the current sensor. Second terminals of the first and second control switches are coupled to ground. The control signal generator closes the first control switch and opens the second control switch in a first phase; opens the first control switch and closes the second control switch in a second phase that alternates with the first phase; and adjusts first phase duration in response to current sensor output, without changing converter period duration.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Inventors: Anant Kamath, Suvadip Banerjee
  • Publication number: 20240136989
    Abstract: A system includes an operational amplifier which includes a first amplifier input, a second amplifier input and an amplifier output. The system includes a first switch which includes a first terminal and includes a second terminal coupled to the first amplifier input. The system includes a second switch which includes a first terminal coupled to the first amplifier input and a second terminal coupled to the second amplifier input. The system includes a first bias current source coupled between the first amplifier input and a common potential and includes a second bias current source coupled between the first terminal of the first switch and the common potential. The system includes a feedback path between the amplifier output and the first amplifier input.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Harsh Sheokand, Tarunvir Singh, Anant Kamath, Suvadip Banerjee
  • Publication number: 20240028540
    Abstract: Various configurations of high-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral, and methods of operating the same, are provided to improve the Remote Wake sequence. Repeaters include circuitry to detect the start of Resume signaling or the end of Resume, following initiation of Remote Wake. In an example, pull-up resistors coupled to upstream differential signal lines and a detection circuit with a current source are controlled to detect the start of Resume signaling. In another example, the upstream-side pull-resistors and an enable signal to an upstream-side transmitter are controlled to detect the end of Resume.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 25, 2024
    Inventors: Mark E. Wentroble, Suzanne M. Vining, Rakesh Hariharan, Anant Kamath, Prajwala Puttappa
  • Patent number: 11803497
    Abstract: Various configurations of high-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral, and methods of operating the same, are provided to improve the Remote Wake sequence. Repeaters include circuitry to detect the start of Resume signaling or the end of Resume, following initiation of Remote Wake. In an example, pull-up resistors coupled to upstream differential signal lines and a detection circuit with a current source are controlled to detect the start of Resume signaling. In another example, the upstream-side pull-resistors and an enable signal to an upstream-side transmitter are controlled to detect the end of Resume.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: October 31, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Mark E. Wentroble, Suzanne M. Vining, Rakesh Hariharan, Anant Kamath, Prajwala Puttappa
  • Publication number: 20230291305
    Abstract: Circuits and systems include a parallel resistor-capacitor (RC) network coupled between a pin and ground, and first and second transistors coupled in source follower configuration with a common gate coupling. The source of the first transistor is coupled to the pin. A first switch couples a drain of the first transistor to the common gate coupling during soft-start (SS) and decouples that connection during over current limit (OCL) sensing, and a second switch couples a drain of the second transistor to the common gate coupling during OCL sensing and decouples that connection during SS. A first current source is enabled deliver a constant current to the pin during SS. A second current source is enabled to generate a reference voltage at the source of the second transistor during OCL, which reference voltage is transferred to the pin by the source follower configuration. A comparator controls the switches to transition from SS to OCL sensing.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 14, 2023
    Inventors: Anandha Ruban Tiruchengode Tirumurugga Bupathi, Suvadip Banerjee, Anant Kamath
  • Publication number: 20230268270
    Abstract: A device includes first and second device terminals, a fuse, a first circuit, a first transistor, and a control circuit. The fuse terminal couples to the first device terminal. The first circuit couples to the second fuse terminal. The second fuse terminal has a first voltage. The first transistor has a first control input and first and second current terminals. The first current terminal couples to the second fuse terminal, and the second current terminal couples to the second device terminal. The control circuit: turns “on” the first transistor into a saturation region if the first voltage exceeds a threshold and a current through the fuse exceeds a trip threshold current of the fuse; and turns “on” the first transistor into a linear region if the first voltage exceeds a threshold and a current through the fuse is below the trip threshold current of the fuse.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 24, 2023
    Inventors: Ujwal RADHAKRISHNA, Vinod RAI, Yogesh RAMADASS, Anant KAMATH, Kashyap BAROT
  • Publication number: 20230237002
    Abstract: An example apparatus includes: a pullup circuit coupled to a first USB terminal; a first pulldown circuit coupled to the first USB terminal; a second pulldown circuit coupled to a second USB terminal; a third pulldown circuit coupled to a third USB terminal; a fourth pulldown circuit coupled to a fourth USB terminal; a high-speed termination detection circuit including: a current source including a first supply terminal and a second supply terminal, the first supply terminal coupled to the first USB terminal, the second supply terminal coupled to the second USB terminal; a first comparator including a first comparator terminal and a second comparator terminal, the first comparator terminal coupled to the first USB terminal; and a second comparator including a third comparator terminal and a fourth comparator terminal, the third comparator terminal coupled to the second USB terminal; and a controller including a first control terminal and a second control terminal, the first control terminal coupled to the sec
    Type: Application
    Filed: January 21, 2022
    Publication date: July 27, 2023
    Inventors: Anant Kamath, Suzanne M. Vining, Rakesh Hariharan, Mark Wentroble, Christopher Rodrigues, Prajwala P
  • Publication number: 20230065119
    Abstract: Various configurations of high-speed data communication devices, e.g., repeaters, interfacing between a host and a peripheral, and methods of operating the same, are provided to improve the Remote Wake sequence. Repeaters include circuitry to detect the start of Resume signaling or the end of Resume, following initiation of Remote Wake. In an example, pull-up resistors coupled to upstream differential signal lines and a detection circuit with a current source are controlled to detect the start of Resume signaling. In another example, the upstream-side pull-resistors and an enable signal to an upstream-side transmitter are controlled to detect the end of Resume.
    Type: Application
    Filed: March 31, 2022
    Publication date: March 2, 2023
    Inventors: Mark E. Wentroble, Suzanne M. Vining, Rakesh Hariharan, Anant Kamath, Prajwala Puttappa
  • Publication number: 20220235330
    Abstract: Methods are disclosed for reprogramming a somatic cell, including an adherent cell and a cell in suspension, into an induced pluripotent stem comprising expressing exogenous Sox-2, exogenous Klf-4, exogenous Oct3/4 from DNA that has not integrated into the genome of the somatic cell, suppressing p53 activity within the somatic cell, and exposing the somatic cell to reprogramming-assistance factors comprising an exogenous Alk-5 inhibitor, an exogenous histone deacetylase inhibitor, and an exogenous activator of glycolysis. Compositions and kits for use in such methods are also disclosed as are cells made by such a method.
    Type: Application
    Filed: February 2, 2022
    Publication date: July 28, 2022
    Applicant: Cellular Engineering Technologies, Inc.
    Inventors: Alan B. MOY, Anant KAMATH
  • Patent number: 11268070
    Abstract: Methods are disclosed for reprogramming a somatic cell, including an adherent cell and a cell in suspension, into an induced pluripotent stem comprising expressing exogenous Sox-2, exogenous Klf-4, exogenous Oct3/4 from DNA that has not integrated into the genome of the somatic cell, suppressing p53 activity within the somatic cell, and exposing the somatic cell to reprogramming-assistance factors comprising an exogenous Alk-5 inhibitor, an exogenous histone deacetylase inhibitor, and an exogenous activator of glycolysis. Compositions and kits for use in such methods are also disclosed as are cells made by such a method.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: March 8, 2022
    Assignee: CELLULAR ENGINEERING TECHNOLOGIES, INC.
    Inventors: Alan B. Moy, Anant Kamath