Patents by Inventor Anant Raj Gupta

Anant Raj Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual first and second pointer for memory mapped interface communication with lower indicating process
    Patent number: 10664407
    Abstract: A set of data entries is transferred via a memory mapped interface from an external peripheral device to a processor device and is stored in a shared memory region. Based on a first pointer to the shared memory region, a first process executed by the processor device processes a first group of the data entries. Based on a second pointer to the shared memory region, a second process executed by the processor device processes a second group of the data entries. The second process indicates the second pointer to the first process. The first process indicates a lower one of the first pointer and the second pointer to the peripheral device.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: May 26, 2020
    Assignee: Intel Corporation
    Inventors: Anant Raj Gupta, Ingo Volkening, Jun Ye Zhou
  • BURST-SIZED LINKED LIST ELEMENTS FOR A QUEUE
    Publication number: 20190065413
    Abstract: Methods, apparatus, circuitry, and systems to construct a queue including a plurality of elements are provided. A method includes receiving metadata describing a first buffer; generating a descriptor based on the metadata; and storing the descriptor in an element. The element is configured to store a predetermined number of descriptors and the element includes an amount of memory corresponding to a burst size of a component configured to read the metadata to control access to the first buffer.
    Type: Application
    Filed: August 25, 2017
    Publication date: February 28, 2019
    Inventor: Anant Raj Gupta
  • DUAL POINTER FOR MEMORY MAPPED INTERFACE COMMUNICATION
    Publication number: 20190004963
    Abstract: A set of data entries is transferred via a memory mapped interface from an external peripheral device to a processor device and is stored in a shared memory region. Based on a first pointer to the shared memory region, a first process executed by the processor device processes a first group of the data entries. Based on a second pointer to the shared memory region, a second process executed by the processor device processes a second group of the data entries. The second process indicates the second pointer to the first process. The first process indicates a lower one of the first pointer and the second pointer to the peripheral device.
    Type: Application
    Filed: May 30, 2018
    Publication date: January 3, 2019
    Inventors: Anant Raj Gupta, Ingo Volkening, Jun Ye Zhou