Patents by Inventor Anastasios S. Maurudis

Anastasios S. Maurudis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7222065
    Abstract: A method for modeling digital signal processors (DSP) in a C++ environment is disclosed. In particular, the method models and converts an operation (or function) from a floating-point model to a given DSP fixed-point processor model. The invention defines a vector space for each DSP fixed-point processor, as a direct sum of each distinct fixed bit length data representation sub-space. The direct sum of all DSP fixed-point processor vector sub-spaces forms a working vector space. Furthermore, the invention defines an operator projection to be performed on the working vector space such that redundancy in the operational behavior of the DSP's to be modeled may be exploited. In the preferred embodiment, the working vector space is in a C++ environment. A C++ class is defined for each distinct fixed bit length data representation of a given DSP fixed-point processor. The behavior of the given DSP fixed-point processor is then modeled in a C++ environment using the library of classes.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: May 22, 2007
    Assignee: Tellabs Operations, Inc.
    Inventors: Anastasios S. Maurudis, John O. Della Morte, Jr., James T. Della Morte
  • Publication number: 20040128119
    Abstract: A method for modeling digital signal processors (DSP) in a C++ environment is disclosed. In particular, the method models and converts an operation (or function) from a floating-point model to a given DSP fixed-point processor model. The invention defines a vector space for each DSP fixed-point processor, as a direct sum of each distinct fixed bit length data representation sub-space. The direct sum of all DSP fixed-point processor vector sub-spaces forms a working vector space. Furthermore, the invention defines an operator projection to be performed on the working vector space such that redundancy in the operational behavior of the DSP's to be modeled may be exploited. In the preferred embodiment, the working vector space is in a C++ environment. A C++ class is defined for each distinct fixed bit length data representation of a given DSP fixed-point processor.
    Type: Application
    Filed: September 30, 2003
    Publication date: July 1, 2004
    Inventors: Anastasios S. Maurudis, John O. Della Morte, James T. Della Morte
  • Patent number: 6741958
    Abstract: A method for modeling digital signal processors (DSP) in a C++ environment is disclosed. In particular, the method models and converts an operation (or function) from a floating-point model to a given DSP fixed-point processor model. The invention defines a vector space for each DSP fixed-point processor, as a direct sum of each distinct fixed bit length data representation sub-space. The direct sum of all DSP fixed-point processor vector sub-spaces forms a working vector space. Furthermore, the invention defines an operator projection to be performed on the working vector space such that redundancy in the operational behavior of the DSP's to be modeled may be exploited. In the preferred embodiment, the working vector space is in a C++ environment. A C++ class is defined for each distinct fixed bit length data representation of a given DSP fixed-point processor.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: May 25, 2004
    Inventors: Anastasios S. Maurudis, John O. Della Morte, Jr., James T. Della Morte
  • Patent number: 6173247
    Abstract: A method for modeling digital signal processors (DSP) in a C++ environment is disclosed. In particular, the method models and converts an operation (or function) from a floating-point model to a given DSP fixed-point processor model. The invention defines a vector space for each DSP fixed-point processor, as a direct sum of each distinct fixed bit length data representation sub-space. The direct sum of all DSP fixed-point processor vector sub-spaces forms a working vector space. Furthermore, the invention defines an operator projection to be performed on the working vector space such that redundancy in the operational behavior of the DSP's to be modeled may be exploited. In the preferred embodiment, the working vector space is in a C++ environment. A C++ class is defined for each distinct fixed bit length data representation of a given DSP fixed-point processor.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: January 9, 2001
    Assignee: DSP Software Engineering, Inc.
    Inventors: Anastasios S. Maurudis, John O. Della Morte, Jr., James T. Della Morte