Abstract: An integrated circuit device can include at least one input; at least one output configured to provide a multi-bit output value; at least one input; at least one output configured to provide a multi-bit output value; a plurality of configurable digital filter circuits; and switch circuits coupled to the at least one input and to the at least one output, the switch circuits configurable to connect same digital filter circuits as a single processing path or separate processing paths.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.

Abstract: A device for Frame Synchronization and coarse frequency offset estimation (CFE) and a method thereof is provided. The method may include the step of receiving a communication signal in a matched filter. The matched filter may be configured for selecting one or more blocks from the communication signal. The matched filter may be further configured for filtering the blocks to obtain an output of the matched filter. The method may also include the step of providing the output of the matched filter to a frame synchronizer and to a coarse frequency estimator. The method may include the step of obtaining substantially simultaneously a symbol boundary using the frame synchronizer and a plurality of metrics using the coarse frequency estimator. Each of the metric may be an indicative of an estimate of coarse frequency offset. The method may further include a step of selecting one of the metric from the plurality of metrics according to the symbol boundary for obtaining an estimate of the coarse frequency offset.

Abstract: A device for Frame Synchronization and coarse frequency offset estimation (CFE) and a method thereof is provided. The method may include the step of receiving a communication signal in a matched filter. The matched filter may be configured for selecting one or more blocks from the communication signal. The matched filter may be further configured for filtering the blocks to obtain an output of the matched filter. The method may also include the step of providing the output of the matched filter to a frame synchronizer and to a coarse frequency estimator. The method may include the step of obtaining substantially simultaneously a symbol boundary using the frame synchronizer and a plurality of metrics using the coarse frequency estimator. Each of the metric may be an indicative of an estimate of coarse frequency offset. The method may further include a step of selecting one of the metric from the plurality of metrics according to the symbol boundary for obtaining an estimate of the coarse frequency offset.