Abstract: A MEMS-actuated autofocus camera module configured for continuous capacitance measurement includes a bridge balance detector coupled to a MEMS actuator driver. The MEMS actuated autofocus camera module is configured to permit online MEMS actuator capacitance measurements to automatically focus images of objects disposed at arbitrary distances from autofocus camera module.

Abstract: A MEMS-actuated autofocus camera module configured for continuous capacitance measurement includes a bridge balance detector coupled to a MEMS actuator driver. The MEMS actuated autofocus camera module is configured to permit online MEMS actuator capacitance measurements to automatically focus images of objects disposed at arbitrary distances from autofocus camera module.

Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Abstract: A bi-directional buffer is connected between a first node and a second node, wherein the first node is connected by a first pull-up resistor to a first voltage supply rail, and the second node is connected by a second pull-up resistor to a second voltage supply rail. In an embodiment, the bi-directional buffer is enabled when a voltage of the first node does not exceed a first threshold voltage, and/or a voltage of the second node does not exceed a second threshold voltage. However, when the voltage of the first node exceeds the first threshold voltage, and the voltage of the second node exceeds the second threshold voltage, the bi-directional buffer is disabled, which disconnects the first and second nodes. This allows the first node to be pulled up to the first voltage supply rail, and the second node to be pulled up to the second voltage supply rail.

Abstract: Embodiments of the present invention are directed to current driver circuits and methods for driving a load. The current driver circuit includes a first transistor (Q1) and a second transistor (Q2) each having a gate, a drain and a source. The drain of the second transistor (Q2) forms the output of the current driver circuit. The first and second transistors (Q1) and (Q2) function as a current mirror when the gates of the first and second transistors (Q1) and (Q2) are selectively connected together. The current driver circuit also includes a current source, a load mimic circuit, and a control loop (e.g., including an op-amp), which are configured to cause the voltage at the drain of the first transistor (Q1) to substantially equal the voltage at the output of the current driver circuit.

Abstract: Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Abstract: A bi-directional buffer is connected between a first node and a second node, wherein the first node is connected by a first pull-up resistor to a first voltage supply rail, and the second node is connected by a second pull-up resistor to a second voltage supply rail. In an embodiment, the bi-directional buffer is enabled when a voltage of the first node does not exceed a first threshold voltage, and/or a voltage of the second node does not exceed a second threshold voltage. However, when the voltage of the first node exceeds the first threshold voltage, and the voltage of the second node exceeds the second threshold voltage, the bi-directional buffer is disabled, which disconnects the first and second nodes. This allows the first node to be pulled up to the first voltage supply rail, and the second node to be pulled up to the second voltage supply rail.

Abstract: Embodiments of the present invention are directed to current driver circuits and methods for driving a load. The current driver circuit includes a first transistor (Q1) and a second transistor (Q2) each having a gate, a drain and a source. The drain of the second transistor (Q2) forms the output of the current driver circuit. The first and second transistors (Q1) and (Q2) function as a current mirror when the gates of the first and second transistors (Q1) and (Q2) are selectively connected together. The current driver circuit also includes a current source, a load mimic circuit, and a control loop (e.g., including an op-amp), which are configured to cause the voltage at the drain of the first transistor (Q1) to substantially equal the voltage at the output of the current driver circuit.

Abstract: Write and read bias current control circuits are programmable through a control port. Both the read head bias DAC and the write DAC are controlled through a control port and both DACs use current as an input reference. The write and the read bias currents have constant reference current components which are set externally. The write and the read bias currents additionally have components which are a product of the reference current and a digital word loaded into an associated one of the DACs.

Abstract: A write driver control circuit controls the voltage level input to a switch circuit, providing increased range for head voltage swings and fast current switching, providing a write driver circuit with a variable voltage level which tracks the write current, as well as temperature and process variations, but which is independent of power supply voltages.

Abstract: An amplifier for biasing and amplifying the signals produced by a magnetoresistive element is provided. The input stage of this circuit includes two transistors in a differential common base configuration having a low input impedance. Since the two transistors are coupled to separate identical current sources, balance between the currents through the two transistors is maintained. The currents are balanced without the use of a feedback loop. Additional input stages may be added to allow signals from additional magnetoresistive elements to be selected and amplified. By using a common mode switching configuration, switching transients are greatly reduced.

Abstract: In a magnetic sensing head with reduced crossfeed interference circuitry, the winding of each half of a magnetic core of the head is wound in the same direction as the other about the core. Each winding is coupled to an individual differential amplifier and the output of each amplifier is fed to another differential amplifier which provides the head output substantially unaffected by interference signals picked up by the head. Both magnetically coupled and stray capacitive interference are compensated.

Abstract: A method is provided to compensate for tape slope (A) and read/write head block (102) azimuth (B) errors in a tape drive system (100). The method writes a data pattern (504) on a magnetic medium (104) at a known slope (C). The portion of the magnetic medium (104) that is encoded with the data pattern (504) is then moved across the read/write head block (102), so that first one read head (154) and then the other read head (152) detects the recorded data pattern (504). The time difference (.DELTA.T.sub.ON) between the event of each head (154, 152) first sensing the data pattern (504), and the time difference (.DELTA.T.sub.OFF) between the points where each head (154, 152) no longer detects the data pattern (504), are both recorded. The recorded information is used to analyze the angular offset (A-B) between the centerline (192) of the tape (104) and the centerline (194) of the read/write head system (102).