Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.

Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.

Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract: An ESD protection circuit comprises a series connection of at least two protection components between a signal line to be protected and a return line (e.g. ground), comprising a first protection component connected to the signal line and a second protection component connected to the ground line. They are connected with opposite polarity so that when one conducts in forward direction the other conducts in reverse breakdown mode. A bias voltage source connects to the junction between the two protection components through a bias impedance. The use of the bias voltage enables the signal distortions resulting from the ESD protection circuit to be reduced.

Abstract: The invention provides a semiconductor device (11) for radiation detection, which comprises a substrate region (1) of a substrate semiconductor material, such as silicon, and a detection region (3) at a surface of the semiconductor device (11), in which detection region (3) charge carriers of a first conductivity type, such as electrons, are generated and detected upon incidence of electromagnetic radiation (L) on the semiconductor device (11). The semiconductor device (11) further comprises a barrier region (2,5,14) of a barrier semiconductor material or an isolation material, which barrier region (2,5,14) is an obstacle between the substrate region (1) and the detection region (3) for charge carriers that are generated in the substrate region (1) by penetration of ionizing radiation (X), such as X-rays, into the substrate region (1).

Abstract: Embodiments of a semiconductor device, a circuit including a semiconductor device and a driver circuit, and a method for operating a semiconductor device are described. In one embodiment, a semiconductor device includes a substrate, a source region, a drain region, and a drain extension region formed in the substrate, and an insulation layer adjacent to the drain extension region. A gate layer and a field plate are formed one of within and on the insulation layer. The field plate is located adjacent to the drain extension region and is electrically insulated from the gate layer and the source region such that a voltage can be applied to the field plate independent from voltages applied to the gate layer and the source region. Other embodiments are also described.

Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.

Abstract: The present invention relates to a method for fabricating a FinFET on a substrate. The method comprises providing a substrate with an active semiconductor layer on an insulator layer, and concurrently fabricating trench isolation regions in the active semiconductor layer for electrically isolating different active regions in the active semiconductor layer from each other, and trench gate-isolation regions in the active semiconductor layer for electrically isolating at least one gate region of the FinFET in the active semiconductor layer from a fin-shaped channel region of the FinFET in the active semiconductor layer.

Abstract: A semiconductor device includes a semiconductor substrate having a first portion and a second portion and a first transistor of a first type formed in the first portion of the substrate, the first transistor being operable at a first voltage, and the first transistor including a doped channel region of a second type opposite of the first type. The semiconductor device also includes a second transistor of the second type formed in the second portion of the substrate, the second transistor being operable at a second voltage greater than the first voltage, the second transistor including an extended doped feature of the second type. Further, the semiconductor device includes a well of the first type in the semiconductor substrate under a gate of the second transistor, wherein the well does not extend directly under the extended doped feature and the extended doped feature does not extend directly under the well.

Abstract: A semiconductor device comprises a substrate including a first region and a second region of a first conductivity type and a third region between the first and second regions of a second conductivity type opposite to the first conductivity type, and being covered by a dielectric layer. A plurality of trenches laterally extend between the third and second region, are filled with an insulating material, and are separated by active stripes with a doping profile having a depth not exceeding the depth of the trenches wherein each trench terminates before reaching the dielectric layer and is separated from the third region by a substrate portion such that the respective boundaries between the substrate portions and the trenches are not covered by the dielectric layer. A method for manufacturing such a semiconductor device is also disclosed.

Abstract: A semiconductor device includes a semiconductor substrate having a first portion and a second portion and a first transistor of a first type formed in the first portion of the substrate, the first transistor being operable at a first voltage, and the first transistor including a doped channel region of a second type opposite of the first type. The semiconductor device also includes a second transistor of the second type formed in the second portion of the substrate, the second transistor being operable at a second voltage greater than the first voltage, the second transistor including an extended doped feature of the second type. Further, the semiconductor device includes a well of the first type in the semiconductor substrate under a gate of the second transistor, wherein the well does not extend directly under the extended doped feature and the extended doped feature does not extend directly under the well.

Abstract: A circuit having a field plate is provided. In accordance with one or more embodiments, an electronic device includes a substrate having an active region, and a contiguous field plate separated from the active region by a dielectric material on the substrate. The field plate has first and second end regions (e.g., opposing one another along a length of the field plate), with the second end region being patterned. The patterned end region has at least one opening therein as defined by edges of the field plate (e.g., along an outer perimeter and/or as an internal opening), and couples a field to the active region in response to a voltage applied to the field plate. This field is greater in strength near the first end region, relative to the patterned end region.

Abstract: A method of fabricating a semiconductor device is provided that includes providing a semiconductor substrate having a first portion and a second portion, forming a first transistor in the first portion of the substrate, the first transistor being operable at a first voltage, and forming a second transistor in the second portion of the substrate, the second transistor being operable at a second voltage greater than the first voltage. The formation of the second transistor includes forming an extended feature of the second transistor with a photomask that is used to adjust a threshold voltage of the first transistor.

Abstract: An extended drain transistor (100) comprising a substrate (101), a gate (103) formed on the substrate (100), the gate (103) having a first side wall (104) and a second side wall (105) opposing the first side wall (104), an extended drain (106) implanted in a surface portion of the substrate (101) adjacent the second side wall (105) of the gate (103), a spacer (107) on the second side wall (105) of the gate (103), a source (108) implanted in a surface portion of the substrate (101) adjacent the first side wall (104) of the gate (103), and a drain (109) implanted in a surface portion of the substrate (101) adjacent the spacer (107) in such a manner that the extended drain (106) is arranged between the gate (103) and the drain (109).

Abstract: A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.

Abstract: A method of manufacturing a transistor (300), the method comprising forming a gate (101) on a substrate (102), forming a spacer (201) on lateral side walls of the gate (101) and on an adjacent portion (202) of the substrate (102), modifying material of the spacer (201) so that the modified spacer (301) covers only a lower portion (303) of the lateral side walls of the gate (101), and providing source/drain regions (301) in the modified spacer (301).

Abstract: Disclosed is a method of manufacturing a vertical bipolar transistor in a CMOS process, comprising implanting an impurity of a first type into a the substrate (100) to form a buried region (150, 260) therein; forming a halo implant (134) using an impurity of a second type and a shallow implant (132) using an impurity of the first type, said halo implant enveloping the shallow implant in the substrate and being located over said buried region (150, 250); forming, adjacent to the halo implant (134), a further implant (136) using an impurity of the second type for providing a conductive connection to the halo implant; and providing respective connections (170, 160, 270) to the further implant (136), the shallow implant (132) and the buried region (150, 260) allowing the shallow implant, halo implant and buried region to be respectively operable as emitter, base and collector of the vertical bipolar transistor.

Abstract: A semiconductor device eg. a MOSFET (1) comprising a substrate (40) including a first region (18) and a second region (16) of a first conductivity type and a third region (42) between the first and second regions of a type opposite to the first conductivity type, and being covered by a dielectric layer (20), a plurality of trenches (12) laterally extending between the third and second region, said trenches being filled with an insulating material, and being separated by active stripes (14) comprising a doping profile having a depth not exceeding the depth of the trenches wherein each trench terminates before reaching the dielectric layer (20),namely is separated from the third region by a substrate portion (26) such that the respective boundaries between the substrate portions and the trenches are not covered by the dielectric layer. A method for manufacturing such a semiconductor device is also disclosed.