Abstract: A phase-locked loop having very fast acquisition, and low output phase jitter and stability at steady-state is provided. In general, the phase-locked loop is used for synchronizing an output signal of said phase-locked loop with an input reference signal. The filter circuit of the phase-locked loop includes a differentiator responsive to the phase difference representing signal from a phase detector in the PLL for providing a differentiated signal, and a filter responsive to both the phase difference representing signal and the differentiated signal to provide a filter output signal. Preferably, the filter is a low-pass filter. The output signal source of the PLL is controlled by a control signal which is generally based on the filter output signal.

Abstract: In a network, such as a large telecommunication switch, intended for the processing of information in different stations and for transmitting information between the stations, centrally located circuits are provided, which independently generate clock signals containing both a system clock rate and a frame synchronizing rate. These clock signals are transmitted on several, in the preferred case three, different transmission lines to a station where a multiplexor makes a selection of a clock signal as controlled by evaluation circuits containing circuits for determining errors in the received clock signals and also containing a state machine. The multiplexor selects periodically and repeatedly all the time a new clock signal in a cyclical pattern, which is accomplished by temporary, very short errors that are introduced when generating the issued clock signals.

Abstract: A functional entity in a digital switch is triplicated in planes operating in parallel. From each plane, a respective passing data flow is spread to parallel planes. A majority vote function receives the data flows of the planes and compares these on a bit level for creating a majority voted data flow. A plane condition sensing function indicates whether links of the planes have meaningful information and synchronism, and emits, as a result, a link condition indicating signal for each plane. A priority select function is connected for receiving the majority voted data flow and the link condition indicating signals. If the link condition indicating signals indicate a fault condition, the priority select function lets the majority voted data flow through as an outgoing data flow from the functional entity.

Abstract: In an STM-network having multiplexer units (1) and a switch (3), for changes in the traffic configuration memories (41,49;43,51) must also be changed, these configuration memories being located in the multiplexer units for controlling reading and writing in intermediate FIFO-type memories (21,23). Unsynchronized writing in the configuration memories (41,49;43,51) is avoided by transmitting suitable signals between the configuration memories, in the suitable case on particular lines (53) provided therefor or otherwise by transmitting particular control messages (rec.) which are located in a time slot having a predetermined position in each transmitted frame.

Abstract: In a network, such as a large telecommunication switch, intended for the processing of information in different stations and for transmitting information between the stations, circuits are provided which generate independently composite clock signals containing both a clocking rate and a frame synchronizing rate. These clock signals are transmitted on three different transmission lines in parallel and independently to a station, where some kind of information processing is made in redundant planes. In the station all incoming clock signals are fed to each one of three independently operating selector units in which a choice of a clock signal is made for obtaining a clock signal to be used in the three redundant planes arranged in parallel to each other and operating independently of each other, in the station.

Abstract: An Asynchronous Transfer Mode (ATM) switching device (20) has ATM cells (both point-to-point and point-to-multipoint) routed therethrough to one or more physical output links (31-38). The switching device (20) includes a cell buffer memory (92) which is the sole storage area on an egress exchange terminal for all cells, including point-to-multipoint cells, regardless of to which physical output link the cell is destined. For point-to-multipoint cells, pointers to the location of the cell in the cell buffer memory (92) are stored in one or more pointer queues (114), the pointer queues (114) corresponding to physical output links over which the point-to-multipoint cells are expected to be propagated. As each physical output link is selected, the pointer in the corresponding pointer queue is used to obtain the cell from the cell buffer memory (92) for readout on the selected link.

Abstract: A method and apparatus for testing for correct connection together of circuit elements in a circuit formed of a plurality of redundant circuit portions. A coded signal is generated at a first circuit element and transmitted upon a signal path believed to connect the first circuit element with a second circuit element. If the coded signal is detected at the second circuit element, the correct connection of the first circuit element together with the second circuit element is verified. Because a coded signal is generated, the correct connection between the circuit elements can be verified even when the signal path connecting the first and second circuit elements is formed of an optical, or other non-electrical, coupler.

Abstract: The invention relates to an arrangement adapted for use in switching equipment which is included in a telecommunications system, wherein the switching equipment includes, among other things, a number of incoming connections (4) that can be coupled via first coupling units (3); a number of outgoing connections (4a) that can be connected via second coupling units (3a);wherein the switching equipment (2) cooperates with or includes requisite control means (11) and coupling means (10) for connecting an incoming connection (4) and/or a part-data flow occurring on such a connection with an indicated outgoing connection (4a), and/or data part-flow that can be transmitted on such a connection;wherein a number of category allocating devices (31) belonging to respective connections and pre-configured normally by a processor associated with the control means (11) are adapted to allocate to each time slot belonging to the time-divided data flow a predetermined category membership such as a "control"-time slot, a CTS-sign

Abstract: A signal transmission system includes one or more signal transmitting units, one or more signal receiving units and a medium adapted for the transmission of selected signals. A transmitted signal carries a number of signal elements which have been allocated to the same or different categories. A number of signal elements that have been allocated to the same category can be coordinated in a receiving unit to form predetermined information. The system includes a unit to increase the number of signal elements that have been allocated to one category (CTS) at the cost of the number of signal elements that have been allocated to another category (DTS) and/or a third category, and so on, or alternatively to carry out one or more selected functions within equipment connected to the receiving unit.