Abstract: A method and apparatus within a processing system is provided for separating access to an instruction memory and a data memory to allow concurrent access by different pipeline stages within the processing system to both the instruction memory and the data memory. An instruction memory interface is provided to access the instruction memory. A data memory interface is provided to access the data memory. Redirection logic is provided to determine whether an access by the data memory interface should be directed to the instruction memory interface utilizing either the address of the access, or the type of instruction that is executing. If the access is redirected, the access to the instruction memory is performed by the instruction memory interface, and data retrieved by the instruction memory interface is then provided to the data memory interface, and in turn to the pipeline stage within the processing system that requested the data memory interface to access the data.