Patents by Inventor Anders M. Jagd

Anders M. Jagd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7634619
    Abstract: A method and apparatus within a processing system is provided for separating access to an instruction memory and a data memory to allow concurrent access by different pipeline stages to both the instruction memory and the data memory. An instruction memory interface is provided to access the instruction memory. A data memory interface is provided to access the data memory. Redirection logic is provided to determine whether an access by the data memory interface should be directed to the instruction memory interface utilizing either the address of the access, or the type of instruction that is executing. If the access is redirected, the access to the instruction memory is performed by the instruction memory interface, and data retrieved by the instruction memory interface is then provided to the data memory interface, and in turn to the pipeline stage that requested the data memory interface to access the data.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: December 15, 2009
    Assignee: MIPS Technologies, Inc.
    Inventors: Gideon D. Intrater, Anders M. Jagd, Ryan C. Kinter
  • Patent number: 6961819
    Abstract: A method and apparatus within a processing system is provided for separating access to an instruction memory and a data memory to allow concurrent access by different pipeline stages within the processing system to both the instruction memory and the data memory. An instruction memory interface is provided to access the instruction memory. A data memory interface is provided to access the data memory. Redirection logic is provided to determine whether an access by the data memory interface should be directed to the instruction memory interface utilizing either the address of the access, or the type of instruction that is executing.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: November 1, 2005
    Assignee: MIPS Technologies, Inc.
    Inventors: Gideon D. Intrater, Anders M. Jagd, Ryan C. Kinter
  • Publication number: 20030204685
    Abstract: A method and apparatus within a processing system is provided for separating access to an instruction memory and a data memory to allow concurrent access by different pipeline stages within the processing system to both the instruction memory and the data memory. An instruction memory interface is provided to access the instruction memory. A data memory interface is provided to access the data memory. Redirection logic is provided to determine whether an access by the data memory interface should be directed to the instruction memory interface utilizing either the address of the access, or the type of instruction that is executing. If the access is redirected, the access to the instruction memory is performed by the instruction memory interface, and data retrieved by the instruction memory interface is then provided to the data memory interface, and in turn to the pipeline stage within the processing system that requested the data memory interface to access the data.
    Type: Application
    Filed: April 26, 2002
    Publication date: October 30, 2003
    Applicant: MIPS Technologies, Inc.
    Inventors: Gideon D. Intrater, Anders M. Jagd, Ryan C. Kinter