Abstract: A method and an apparatus for computing Fast Fourier Transforms (FFT) on a serial input of data blocks are described. Two input buffers share one data processing device in such a way that, at any given time, one buffer is receiving input data while the data in the other buffer is being processed. The need for bit reversal of the data block in the input buffer is eliminated, thus removing one time consuming step in the FFT. This is achieved by writing blocks of input data to the buffer alternately in natural order and in bit reversed order. When the output data in the buffer is in the reverse order, the buffer is addressed in the same reverse order so that the data points are sent in the correct order to the output. At the same time, the new input data is written to the buffer in the reverse order.

Abstract: The present invention significantly reduces the number of complex computations that must be performed in computing the discrete Fourier transform (DFT) and inverse DFT (IDFT) operations. In particular, the DFT and IDFT operations are computed using the same computing device. The computation operations are substantially identical for both operations with the exception that for the IDFT operation, the data are complex conjugated before and after processing. Using the same computing device/operations, both DFT and IDFT computations are optimized for maximum efficiency. A common transform process is selectively connected to first and second data processing paths. A DFT operation is performed on an N-point sequence on the first data processing path, and an IDFT operation is performed on an N-point sequence on the second data processing path using the same N-point fast Fourier transform (FFT).