Abstract: In the detection of the presence of a biomarker or the like in a sample of a flowable substance, e.g. a powder or a liquid, usually a body fluid, such as blood, urine, or saliva, for example, a disposable sample receiver (3) is used, which has a receiving chamber (301) that is dimensioned to receive a predetermined volume and is surrounded by a depression (303) receiving any excess volume for which there is no room in the receiving chamber (301). The receiving chamber (301) has a bottom outlet (302) closed by a removable strip (33), e.g. a plastic strip or foil. Upon pulling away the strip (33) from the bottom outlet, the sample in the receiving chamber is emptied into a flow path (32) leading to at least one detection compartment (321) permitting direct visual inspection. Preferably, disposable sample receiver (3) is used in a detector assembly (1) including an electronic camera (23), a CPU (26) and a display (22).

Abstract: In the detection of the presence of a biomarker or the like in a sample of a flowable substance, e.g. a powder or a liquid, usually a body fluid, such as blood, urine, or saliva, for example, a disposable sample receiver (3) is used, which has a receiving chamber (301) that is dimensioned to receive a predetermined volume and is surrounded by a depression (303) receiving any excess volume for which there is no room in the receiving chamber (301). The receiving chamber (301) has a bottom outlet (302) closed by a removable strip (33), e.g. a plastic strip or foil. Upon pulling away the strip (33) from the bottom outlet, the sample in the receiving chamber is emptied into a flow path (32) leading to at least one detection compartment (321) permitting direct visual inspection. Preferably, disposable sample receiver (3) is used in a detector assembly (1) including an electronic camera (23), a CPU (26) and a display (22).

Abstract: To minimize power dissipation in a line driver (3) in a central office (CO) for driving a DSL connection to a network terminal (NT) with a predetermined maximum constellation size, the central office (CO) supplies the line driver (3) with a predetermined supply voltage during a training sequence, and transfers data with a predetermined power spectral density in all available channels. The network terminal (NT) measures the signal-to-noise ratio of each channel, and transfers information to the central office (CO) about channels having signal-to-noise ratios that enable transfer of data.

Abstract: The invention relates to a method for forming a high voltage NMOS transistor together with a low voltage NMOS transistor and a low voltage PMOS transistor, respectively, in an n-well CMOS process by adding solely two additional process steps to a conventional CMOS process: (i) a masking step, and (ii) an ion implantation step for forming a doped channel region for the high voltage MOS transistor in the substrate self-aligned to the edge of the high voltage MOS transistor gate region. The ion implantation is performed through the mask in a direction, which is inclined at an angle to the normal of the substrate surface, to thereby create the doped channel region partly underneath the gate region of the high voltage MOS transistor.

Abstract: An arrangement in a semiconductor component includes a highly doped layer on a substrate layer and is delimited by at least one trench extending from the surface of the component through the highly doped layer. A sub-layer between the substrate layer and the highly doped layer is doped with the same type of dopant as the buried collector, but to a lower concentration. The sub-layer causes a more even distribution of the potential lines in the substrate and in a sub-collector layer, thereby eliminating areas of dense potential lines and increasing the breakdown voltage of the component, (i.e., because the breakdown voltage is lower in areas with dense potential lines).

Abstract: A silicon substrate material based on silicon has a semi-insulating interior layer isolating the bulk of the substrate material from the top layers, where integrated circuits are to be built. The semi-insulating layer is created by producing submicron particles having Schotty barriers or pn-hereto-barriers and distributing X particles so that the depletion regions then produced around neighbouring particles overlap. Such particles will then deplete the silicon material from electric charge carriers. The substrate material can then be processed using the standard silicon processing methods and allows integrated circuits to be manufactured which are suitable for high frequency applications. A silicon substrate is made by sputtering a metal such as Co in a silicon wafer and then silicidizing the sputtered Co atoms by means of an annealing treatment. A top silicon wafer having a silicon dioxide layer at its bottom surface is then bonded to the sputted layer.

Abstract: A semiconductor includes a buried conducting layer, such as a buried collector, comprises a trench, the walls of which are covered with a layer of a material in which dopant ions diffuse faster than in monocrystalline silicon. A contact area is doped in close proximity to the trench wall. The dopants will diffuse through the layer and form a low resistance connection to the buried layer. The layer may comprise polysilicon or porous silicon, or a silicide. If the material used in the layer is not in itself conducting, the size of the component may be significantly reduced.

Abstract: A conductor 1 crossing a trench around an electrical component 1 is electrically connected to an isolated intermediate conducting region in order to move the field strength concentrations out of the electrical component and into the intermediate conducting region. This prevents avalanche breakdown occurring in the electrical component.

Abstract: A silicon substrate material based on silicon has a semi-insulating interior layer isolating the bulk of the substrate material from the top layers, where integrated circuits are to be built. The semi-insulating layer is created by producing submicron particles having Schottky barriers or pn-hetero-barriers and distributing the particles so that the depletion regions then produced around neighbouring particles overlap. Such particles will then deplete the silicon material from electric charge carriers. The substrate material can then be processed using the standard silicon processing methods and allows integrated circuits to be manufactured which are suitable for high frequency applications. A silicon substrate is made by sputtering a metal such as Co in a silicon wafer and then silicidizing the sputtered Co atoms by means of an annealing treatment. A top silicon wafer having a silicon dioxide layer at its bottom surface is then bonded to the sputtered layer.