Patents by Inventor Andras F. Cserhati

Andras F. Cserhati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5356822
    Abstract: A method for making all complementary BiCDMOS devices on a SOI substrate (10). Isolated n.sup.- and p.sup.- regions (20,32,34,36,40,42) are formed on the silicon layer (16) and oxidized. LOCOS oxide regions (28) are formed on selected pairs of the n.sup.- and p.sup.- regions on which gates (44) for complementary DMOS device (114,116) and field plates (46) for complementary bipolar devices (118,120) are formed. Gates (48) for complementary MOS devices (122,124) are formed directly on the oxidized silicon layer (24). N-type and p-type dopants are then implanted into the silicon layer (16) forming n body and p body areas (54,56,58,60). Selected n.sup.+ and p.sup.+ areas (66,68) are formed in the n body and p body areas (54,56,58,60) as well as selected areas of n.sup.- and p.sup.- regions (30,32,34,36,40,42). The substrate (10) is then covered with an oxide layer and windows etched therethrough to expose said n.sup.+ and p.sup.+ areas (66,68) and selected areas of the gates (44,48) and field plates (46).
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: October 18, 1994
    Assignee: AlliedSignal Inc.
    Inventors: John Lin, Andras F. Cserhati
  • Patent number: 5103277
    Abstract: Means for compensating for threshold voltage shifts of Metal Oxide Semiconductor Field Effect Transistors (MOS FETs) of a Large Scale Integrated Circuit device (LSI), where the threshold voltage shifts are induced by radiation dosage. The FETs are formed in a relatively thin layer of silicon on an insulator film supported by a substrate. The compensating means includes a pair of sensor FETs formed integrally with the LSI device, an operational amplifier and a back gate formed opposite the channel regions of the FETs of the LSI device. The sensor FETs develop an output voltage that is applied as one input to the operational amplifier. A reference voltage, equal to the sensor output voltage prior to exposure to radiation, is applied as a second input to the operational amplifier. The amplifier output is applied to the back gate. The sensor output voltage changes as a result of radiation dosage.
    Type: Grant
    Filed: December 13, 1990
    Date of Patent: April 7, 1992
    Assignee: Allied-Signal Inc.
    Inventors: Anthony L. Caviglia, Andras F. Cserhati, John B. McKitterick