Abstract: A method and apparatus for medium access control in a receiver is shown, involving frequency hopping through each of a plurality of channel frequencies for the receiver, monitoring a baseband section of the receiver using a data quality detector (DQD) circuit configured to assert a DQD signal when valid data is sensed at the output of a demodulator of the receiver, waiting a first preset period of time after changing the channel frequency for each frequency hop and monitoring whether the DQD signal is asserted, resuming frequency hopping if the DQD signal is not asserted within the first preset period of time, and maintaining a current channel frequency in order to receive a data packet if the DQD is asserted.

Abstract: A system and method is shown for automatic frequency correction in a receiver, where the number of clock cycles in a baseband data signal, such as an I or Q channel of the receiver or an XOR of the I and Q channels, for a “1” state and a “0” state of a received data signal are each determined and the difference between the two is used to calculate a subsequent frequency offset correction value. The subsequent frequency offset correction value is added to a current offset correction value to obtain an actual offset correction value. The actual offset correction value is then used to adjust the frequency of the receiver clock.

Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.

Abstract: A method and apparatus for medium access control in a receiver is shown, involving frequency hopping through each of a plurality of channel frequencies for the receiver, monitoring a baseband section of the receiver using a data quality detector (DQD) circuit configured to assert a DQD signal when valid data is sensed at the output of a demodulator of the receiver, waiting a first preset period of time after changing the channel frequency for each frequency hop and monitoring whether the DQD signal is asserted, resuming frequency hopping if the DQD signal is not asserted within the first preset period of time, and maintaining a current channel frequency in order to receive a data packet if the DQD is asserted.

Abstract: A system and method is shown for automatic frequency correction in a receiver, where the number of clock cycles in a baseband data signal, such as an I or Q channel of the receiver or an XOR of the I and Q channels, for a “1” state and a “0” state of a received data signal are each determined and the difference between the two is used to calculate a subsequent frequency offset correction value. The subsequent frequency offset correction value is added to a current offset correction value to obtain an actual offset correction value. The actual offset correction value is then used to adjust the frequency of the receiver clock.

Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.

Abstract: Transmitter and receiver circuits are shown that are capable of operating in a stand-alone mode without the necessity of an external controller to program the transmitter and receiver circuits, such as by providing operating parameters through a control interface. An internal controller of the transmitter detects that no external controller is present and operates to access an external storage device, such as an EEPROM, to obtain data for configuring at least some of the operating characteristics of the transmitter. The transmitter may be configured to respond to predetermined events by accessing corresponding data at predetermined addresses of the EEPROM. The internal controller of the receiver may also detect that no external controller is present and to obtain data for configuring at least some of the operating characteristics of the receiver.