Patents by Inventor Andras Sarkozy

Andras Sarkozy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5893919
    Abstract: A protection mechanism for use in a mass storage system for providing user selectable levels of protection against data loss wherein storage segments of a plurality of disk drives are organized into at least two functionally separate logical units and a memory management mechanism is responsive to an identification of a logical unit as selected for mirroring by writing a first copy of a data block assigned to a first storage address in a designated logical unit into the assigned storage address in the designated logical unit and writing a second copy of the data block into a second storage address in the disk drives wherein the second storage address is skewed with respect to the first storage address so that the second storage address is located in a disk drive separate from the data disk drive containing the first storage address, and writing at least one parity block containing parity information relating to the data block into a disk drive.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: April 13, 1999
    Assignee: Storage Computer Corporation
    Inventors: Andras Sarkozy, John O'Brien, Gregory Flynn
  • Patent number: 5790774
    Abstract: Table Vectored Parity (TVP) of the present invention is a new method for the allocation of parity check information in multi disk storage systems. This technique permits an optional selection by the end user to store parity check information on a subset of any number of disks ranging from 1 to N, where there are N disks in the system.
    Type: Grant
    Filed: May 21, 1996
    Date of Patent: August 4, 1998
    Assignee: Storage Computer Corporation
    Inventor: Andras Sarkozy
  • Patent number: 5732238
    Abstract: A non-volatile cache mechanism connected to a bus connected for conducting write addresses and data from a host computer to mass storage devices and to a volatile cache wherein each write operation includes a write address and at least one data word. The non-volatile cache mechanism includes a non-volatile memory constructed of a plurality of sub-memories having overlapping read/write cycles for storing the data words, a cache control responsive to the write operations for writing the data words into the nonvolatile memory in parallel with receipt of the data words into the volatile cache, and a cache index for storing index entries relating write addresses of write operations on the bus with corresponding storage addresses of the data words in the non-volatile memory.
    Type: Grant
    Filed: June 12, 1996
    Date of Patent: March 24, 1998
    Assignee: Storage Computer Corporation
    Inventor: Andras Sarkozy
  • Patent number: 5720027
    Abstract: A redundant disk computer system providing targeted data broadcast on the data bus to a plurality of devices on the data bus, such as computer central memory and a plurality of storage media disks (parity and data) under control of a real time operating system. Each of the plural disk storage media is each connected to the data bus with a corresponding enhanced disk adapted including a demand page memory of size sufficient to include a selected block of data and arranged to provide access to a selected portion of that data. The redundant array computer operating system provides the control and selected designation of the disk adapters as targeted receivers to read data "broadcast" over the data bus, providing simultaneous transfer of data over the data bus. Each enhanced disk adapter further includes exclusive-OR logic thereon to provide direct calculation of parity from the newly received data and a subsequently received old data on a single subsequent data bus cycle.
    Type: Grant
    Filed: May 21, 1996
    Date of Patent: February 17, 1998
    Assignee: Storage Computer Corporation
    Inventors: Andras Sarkozy, James Valentino
  • Patent number: 5257367
    Abstract: This invention provides disk drive access control apparatus for connection between a host computer and a plurality of disk drives to provide an asynchronously operating storage system. It also provides increases in performance over earlier versions thereof. There are a plurality of disk drive controller channels connected to respective ones of the disk drives and controlling transfers of data to and from the disk drives, each of the disk drive controller channels includes a cache/buffer memory and a micro-processor unit. An interface and driver unit interfaces with the host computer and there is a central cache memory. Cache memory control logic controls transfers of data from the cache/buffer memory of the plurality of disk drive controller channels to the cache memory and from the cache memory to the cache/buffer memory of the plurality of disk drive controller channels and from the cache memory to the host computer through the interface and driver unit.
    Type: Grant
    Filed: July 17, 1990
    Date of Patent: October 26, 1993
    Assignee: Cab-Tek, Inc.
    Inventors: Theodore J. Goodlander, Raul Kacirek, Andras Sarkozy, Tamas Hetenyi, Janos Selmeczi