Abstract: A non-volatile memory cell 100 and method for reading it are disclosed. The system includes a static latch 125 having a first terminal and a second terminal, a first transistor 124 having a first current electrode coupled to said first terminal of said static latch 125 and a fusible element 110 having a first terminal coupled to a second current electrode of the first transistor 125 and a second terminal coupled to a first power supply voltage terminal. In a particular embodiment, the non-volatile memory cell includes a fusible element programming circuit 140 coupled to the first terminal of said fusible element. In another particular embodiment, the non-volatile memory cell includes a cell preset circuit 120 coupled to a control electrode of the first transistor.