Abstract: A programmable relay control device is provided for determining the level of at least two outputs as a function of signals present at the inputs and timing signals from a clock, comprising down-counting decades and programming and reprogramming means. This device comprises reprogrammable remanent memories and logic networks whose configuration is controlled by the outputs of said remanent memories. These logic networks comprise routing grids in which one output at most corresponds to every input, these grids receiving different input signals and intermediate variable signals and delivering parameter signals and different output signals, and a combination grid in which every output may correspond to a logic combination of the inputs, receiving said parameter signals for delivering said intermediate variable signals.

Abstract: A digital timer with constant resolution comprising a clock and a chain of binary down-counters, each of which corresponds to a timing range which is a mutiple of that of the preceding down-counter. The binary outputs of the down-counters are fed in parallel to display points of a first set of display points, enabling means being provided so that only the output of the most significant down-counter not at zero actuates the display points. A display point of a second set of display points is associated with each down-counter so that only the display point corresponding to the most significant down-counter not at zero is actuated.