Abstract: A circuit arrangement for the coarse synchronization of carrier signals and pulse signals with data signals in a data receiver is disclosed in which data signals modulated by a data transmitter are received and in which a carrier regulation stage generating the carrier signals, a pulse regulation stage for varying the phase of pulse signals, a demodulator demodulating the modulated data signals, using the carrier signals, and a sampler for sampling the demodulated data signals, using the pulse signals, and wherein a switching stage, which receives sampled data signals generated by the sampler, delivers to a carrier regulation stage first control signals altering the phase of the carrier signals and to a pulse regulation stage second control signals altering the phase of the pulse signals, as long as the difference between the momentary values of the sampled data signals and their theoretical values averaged over a prescribed duration of time exceeds a prescribed threshold value.

Abstract: A method is described for phase regulating a received timing signal in a data transmission system wherein the transmissions contain partial response pulses. In a receiver the composite transmitted signal is reproduced, and it generally differs from certain given values. A sampling signal having amplitudes indicating these differences is produced. The sampling signal is multiplied by a factor signal to produce a multiplicative signal. The latter is integrated to produce a regulating signal used for making the aforementioned phase adjustment.