Patents by Inventor Andre Luis

Andre Luis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180018125
    Abstract: An apparatus embodiment includes an integrated circuit (IC) and breach-detection circuitry. The IC includes data storage circuitry, a power grid configured to distribute power to the data storage circuitry, and a plurality of nodes distributed over at least one sensitive region of the IC. The breach-detection circuitry monitors power grid integrity at the at least one sensitive region of the IC and detects an event indicative of a breach by an external probe at a portion of the at least one sensitive region in response to floating node detection or a change in voltage at one of the plurality of nodes.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 18, 2018
    Inventors: Fabio Duarte De Martin, Andre Luis Vilas Boas, Guilherme Godoi
  • Patent number: 9697561
    Abstract: A customer purchasing workflow management functionality related to a customer account hosted by a vendor system is presented on a client computing device in a dashboard page. The system allows a customer to visualize purchasing workflows and processes by authorized purchasers and by authorized approvers, including the spending and approval limits associated with each, and the relationships therebetween. The system further provides for editing of the stored information comprising the purchasing workflows and processes.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 4, 2017
    Assignee: W.W. GRAINGER, INC.
    Inventors: Andre Luis Wilman Rego, Julie A. Dierwechter, Craig Millman, Arlen James Young, Ezio Enrico Magarotto, Bryan David Anderson
  • Patent number: 9680453
    Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing oscillator circuits. In certain embodiments, an apparatus includes an oscillator circuit having one or more capacitors. The oscillator circuit is configured to generate an oscillating signal by repeated charging and discharging of the capacitors. The apparatus also includes a control circuit connected to the oscillator. The control circuit is configured to set the oscillation frequency of the oscillator circuit as a non-linear function of an input control signal. For instance, in a more specific embodiment, the control circuit may be configured to set oscillation frequency of the oscillator circuit to a frequency scaled by a value raised to an exponent specified by the input control signal.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Pedro Barbosa Zanetta, Andre Luis Vilas Boas
  • Patent number: 9644593
    Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: May 9, 2017
    Assignee: NXP USA, INC.
    Inventors: Adriano Marques Pereira, Sunny Gupta, Andre Luis Vilas Boas, Pedro Barbosa Zanetta, Ivan Carlos Ribeiro Nascimento, Carl Culshaw
  • Patent number: 9645196
    Abstract: A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions of an electronic circuit within the integrated circuit in response to a momentary signal applied to the probe pad, a first inverter (221) having an input coupled to the probe pad and having an output coupled to a control input of the transmission gate, and a second inverter (222) having an input coupled to an output of the first inverter and having an output coupled to another control input of the transmission gate. The output of the second inverter is coupled to the input of the first inverter. Upon power-up, the transmission gate is open. After the momentary signal is applied to the probe pad, the transmission gate closes and remains closed until power is disconnected.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: May 9, 2017
    Assignee: NXP USA, INC.
    Inventors: Fabio Duarte De Martin, Andre Luis Vilas Boas
  • Patent number: 9641129
    Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Pureza Coimbra, André Luis Vilas Boas, Alfredo Olmos
  • Publication number: 20170093393
    Abstract: The invention concerns a driver circuit for driving a P-Channel MOSFET. The driver circuit is fed by a DC voltage supplied at a power input and it receives a control signal at a control input. The control signal includes the information for controlling a switching of a P-Channel MOSFET the gate of which is connected to a drive output of the driver circuit. For generating the drive signal the driver circuit includes a turn-off bipolar transistor which is powered by the supply voltage received at the power input in that its collector is connected to the power input. The control signal received at the control input is amplified by means of a current amplifier and fed to the base of the bipolar transistor via an inverting capacitor. In response to the amplified control signal at its base, the bipolar transistor actively generates a turn-off signal and provides the turn-off signal to the drive output in that the emitter of the bipolar transistor is connected to the drive output.
    Type: Application
    Filed: September 15, 2016
    Publication date: March 30, 2017
    Applicant: DET International Holding Limited
    Inventors: André Luis Pesco ALCALDE, Christian KRUMPHOLZ
  • Publication number: 20170077872
    Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 16, 2017
    Inventors: Ricardo Pureza COIMBRA, André Luis VILAS BOAS, Alfredo OLMOS
  • Publication number: 20160353669
    Abstract: A remote-controlled robotic equipment for tree pruning near energized power lines, which, provides a remote-controlled robotic equipment in its own, specific electromechanical structure coupled to a truck and based on a robotic arm with a stand, a positioner, a handler and an end effector-pruning tool, a collection bin and a tree branch shredder, which are all integrated, for robotized tree pruning near energized power lines, which can conveniently, safely and precisely streamline the procedures adopted in the maintenance of aerial electric power distribution networks, more specifically, tree pruning near urban electric power distribution networks, combined with full ergonomics and no exposure of operators.
    Type: Application
    Filed: May 26, 2016
    Publication date: December 8, 2016
    Inventors: Kátia Cilene Falcão XAVIER, Mario Antonio Duarte BOMFIM, Roberto Chagas de ALMEIDA, Dailton Pedreira CERQUEIRA, Mariella Mendes REVILLA, Luciano Cavalcante SIEBERT, Alexandre Albarello COSTA, Eduardo Kazumi YAMAKAWA, Henry Leonardo López SALAMANCA, Edemir Luiz KOWALSKI, José Francisco BIANCHI FILHO, André Luis Muller da SILVA, Luis Ricardo Alfaro GAMBOA, Ronaldo Antonio RONCOLATTO, Luiz Felipe Ribeiro Barrozo TOLEDO, Thiago GREBOGE, Diogo Biasuz DAHLKE, Felipe Araújo Teixeira NORONHA
  • Publication number: 20160348041
    Abstract: The present invention relates to a cosmetic composition, particularly indicated for skin cleaning, which comprises at least one plant oil comprising 40% to 60% of fatty chain containing 12 carbons, C12, such chain may be saturated or unsaturated; at least one saponifying agent; and aqueous portion. The invention also relates to a process for preparing said cosmetic composition, as well as the use thereof.
    Type: Application
    Filed: August 11, 2016
    Publication date: December 1, 2016
    Inventors: André Luís BRASILINO DE CARVALHO, Rodrigo PEREIRA LIMA, Reinaldo RUBENS MIGUEL, Tadeu DE OLIVEIRA MARIN CHICOL
  • Patent number: 9442501
    Abstract: A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 13, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stefano Pietri, Chris C. Dao, Andre Luis Vilas Boas
  • Patent number: 9356569
    Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: May 31, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Andre Luis Vilas Boas, Edevaldo Pereira Silva, Jr., Pedro Barbosa Zanetta, Eduardo Ribeiro da Silva
  • Patent number: 9143115
    Abstract: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: September 22, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ivan Carlos Ribeiro Nascimento, Andre Luis Vilas Boas
  • Patent number: 9140389
    Abstract: The present invention relates to new graphene-based steel tubes, pipes or risers, whose products are obtained by a method of manufacturing that consists in adding graphene nanosheets, heat treatment, forming tubular geometry and surface finish. In addition to the unique chemical composition based on graphene, with carbon content ranging between 0.01 and 21.0%, these products have the wall thickness between 800 nm and 80 mm (from ultra fine to thick), diameter between 10 and 5000 mm, and having a tensile strength not less than 2000 MPa reaching up to 50 GPa, with far superior features to those obtained by other methods. Such products can be used for petroleum, natural gas and biofuels transportation, including in deepwater submarine riser systems (>1500 m), with direct application in the oil industry.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: September 22, 2015
    Assignee: STATE UNIVERSITY OF PONTA GROSSA
    Inventors: André Luis Moreira De Carvalho, Nadia Khaled Zurba
  • Publication number: 20150211470
    Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.
    Type: Application
    Filed: January 29, 2014
    Publication date: July 30, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Adriano Marques Pereira, Sunny Gupta, Andre Luis Vilas Boas, Pedro Barbosa Zanetta, Ivan Carlos Ribeiro Nascimento, Carl Culshaw
  • Publication number: 20150180454
    Abstract: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.
    Type: Application
    Filed: March 5, 2015
    Publication date: June 25, 2015
    Inventors: Ivan Carlos Ribeiro NASCIMENTO, Andre Luis VILAS BOAS
  • Patent number: 9051057
    Abstract: Diverter assemblies for aircraft air inlets include a diverter structure at least substantially surrounding the air inlet, and a fairing mounted to an upper edge of the diverter structure forwardly of the air inlet.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: June 9, 2015
    Assignee: EMBRAER S.A.
    Inventors: Carlos Roberto Ilário Da Silva, André Luis Roncatto, Antônio Nunes Belém, Marcelo Faria Da Cunha
  • Publication number: 20150143878
    Abstract: An assembly and method of testing the integrity of a sealing ring of a flexible pipe are disclosed. The method includes locating a first sealing ring adjacent a first collar member and a layer of flexible pipe body; energising the first sealing ring by urging the sealing ring towards a primary pressure-retaining end fitting component, or by urging the pressure- retaining component towards the sealing ring; locating a second sealing ring adjacent the first collar member and a second collar member; energising the second sealing ring by urging the sealing ring towards the pressure-retaining component, or by urging the pressure-retaining component towards the sealing ring; and pressurising the region between the first sealing ring and the second sealing ring through a port extending towards the region to a predetermined pressure of 5 MPa or greater.
    Type: Application
    Filed: June 24, 2013
    Publication date: May 28, 2015
    Applicant: GE OIL & GAS UK Limited
    Inventors: Judimar de Assis Clevelario, Fabio de Souza Pires, Felipe Areas Vargas, Everton Vieira de Almeida, Andre Luis de Souza Breves
  • Patent number: 9041366
    Abstract: A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: May 26, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ivan Carlos Ribeiro Nascimento, Andre Luis Vilas Boas
  • Publication number: 20150109054
    Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.
    Type: Application
    Filed: October 18, 2013
    Publication date: April 23, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Andre Luis Vilas Boas, Edevaldo Pereira Silva, JR., Pedro Barbosa Zanetta, Eduardo Ribeiro da Silva