Abstract: A lateral semiconductor device (20) such as LDMOS, a LIGBT, a lateral diode, a lateral GTO, a lateral JFET or a lateral BJT, comprising a drift region (12) having a first surface (22) and a first conductivity type, first and second conductive (4, 8) extending into the drift region from the first surface. The lateral semiconductor device further comprises an additional region (24) or several additional regions, having a second conductivity type, between the first and second semiconductor regions (4, 8), the additional region extending into the drift region from the first surface (22), wherein the additional region forms a junction dividing the electric field between the first and second semiconductor regions when a current path is established between the first and second semiconductor regions. This allows the doping concentration of the drift region to be increased, thereby lowering the on-resistance of the device.

Abstract: A lateral semiconductor device (20) such as LDMOS, a UIGBT, a lateral diode, a lateral GTO, a lateral JFRT or a lateral BJT, comprising a drift region (12) having a first surface (22) and a first conductivity type, first and second conductive regions (4, 8) extending into the drift region from the first surface. The lateral semiconductor device further comprises an additional region (24) or several additional regions, having a second conductivity type, between the first and second semiconductor regions (4, 8), the additional region extending into the drift region from the first surface (22), wherein the additional region forms a junction dividing the electric field between the first and second semiconductor regions when a current path is established between the first and second semiconductor regions. This allows the doping concentration of the drift region to be increased, thereby lowering the on-resistance of the device.

Abstract: The object of the invention is an implantable intervertebral connection device comprising at least two pedicular screws (1, 2) provided in their upper portion with a hexagonal head (3) prolonged by a cylindrical bearing (4, 4′) and an inter-screw connection of adjustable length anchored at each end on said bearings, characterized in that said inter-screw connections constituted, on the one hand, by a ball (7, 7′) preferably of a resiliently deformable material threaded on each bearing (4) and, on the other hand, by two connection elements (E1, E2; E′1, E′2) in prolongation of each other and interconnected by a screw system (17, 18; 18′, 41, 42) for adjustment of spacing, the free ends of the elements being shaped as a cup (8, 9; 8′, 9′) which is concave and threadable on said bearing (4, 4′) and matching said ball (7, 7′) such that in line with each pedicular screw (1, 2; 1′, 2′) the ball will be sandwiched between two cups (8, 9; 8′, 9&p

Abstract: A medical screw adapted to be anchored in osseous material during surgery to secure a suture (26). The screw has a screw body (14) provided with a screw thread (16). Two longitudinal recesses (22) permit free passage of a suture (26) longitudinally in a loop below the screw. A transverse slot (18) receives the screwdriver blade of a tool to rotate the screw body. A quantity of suture is stored in and dispensed from the tool.

Abstract: A method for forming a semiconductor sensor device comprises providing a substrate (4) and forming a sacrificial layer (18) over the substrate. The sacrificial layer (18) is then patterned and etched to leave a portion (19) on the substrate (4). A first isolation layer (6) is formed over the substrate (4) and portion (19) of the sacrificial layer and a conductive layer (12), which provides a heater for the sensor device, is formed over the first isolation layer (6). The portion (19) of the sacrificial layer is then selectively etched to form a cavity (10) between the first isolation layer (6) and the substrate (4), the cavity (10) providing thermal isolation between the heater and the substrate.

Abstract: A semiconductor fuse device is formed of a conductive semiconductor substrate (11) having a top surface and a bottom surface. A layer (12) of dielectric material is provided on a portion of the top surface and a first conductive layer (15) is formed wholly on a first portion of the layer (12) of dielectric material and forms a first contact of the device. A second conductive layer (14) is formed on a second portion of the layer (12) of dielectric material spaced from the first portion and extends to contact the top surface of the substrate (11). A fuse portion (16) is formed wholly on the layer (12) of dielectric material and extends between and in electrical contact with the first and second conductive layers (14, 15). The bottom surface of the substrate (11) provides a second contact of the device, so that only one wire bond is necessary.

Abstract: A protected Darlington transistor arrangement comprising: first (2) and second (4) bipolar transistors each having a base, a collector and an emitter, the base of the first transistor being coupled to the base (B) of the Darlington transistor, the collectors of the first and second transistors being coupled to the collector (C) of the Darlington transistor, the emitter of the first transistor being coupled to the base of the second transistor, and the emitter of the second transistor being coupled to the emitter (E) of the Darlington transistor; and a third bipolar transistor (6) having a base, a collector coupled to the collector of the Darlington transistor, and an emitter, wherein the Darlington transistor arrangement further comprises: a Zener diode (8) coupled between the collector of the Darlington transistor and the base of the third transistor, the base of the third transistor being coupled to the emitter of the second transistor, and the emitter of the third transistor being coupled to the base of th

Abstract: A passivation process and structure with self-alignment with the location of a mask wherein oxygen-doped poly-crystalline silicon is deposited on a semiconductor surface, a part of which is occupied by a silicide or by a silicon-metal eutectic. The sipox deposit is adhesive to the semiconducting parts and not to said part. The invention applies to the miniaturization of semiconductor components and integrated circuits.