Patents by Inventor Andre Poock

Andre Poock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8660681
    Abstract: A process monitoring system may detect out-of-control situations on the basis of a single criterion for a plurality of different lithography processes. To this end, each data set related to a specific type of lithography process may be processed so as to determine relative data, which may be centered around the same mean value for each of the different process types for a standard control situation.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: February 25, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Andre Poock, Daniel Zschaebitz, Heike Scholtz
  • Publication number: 20120004758
    Abstract: A process monitoring system may detect out-of-control situations on the basis of a single criterion for a plurality of different lithography processes. To this end, each data set related to a specific type of lithography process may be processed so as to determine relative data, which may be centered around the same mean value for each of the different process types for a standard control situation.
    Type: Application
    Filed: January 14, 2011
    Publication date: January 5, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Andre Poock, Daniel Zschaebitz, Heike Scholtz
  • Patent number: 7977225
    Abstract: In extremely scaled semiconductor devices, an asymmetric transistor configuration may be established on the basis of tilted implantation processes with increased resist height and/or tilt angles during tilted implantation processes by providing an asymmetric mask arrangement for masked transistor elements. For this purpose, the implantation mask may be shifted by an appropriate amount so as to enhance the overall blocking effect for the masked transistors while reducing any shadowing effect of the implantation masks for the non-masked transistors. The shift of the implantation masks may be accomplished by performing the automatic alignment procedure on the basis of “shifted” target values or by providing asymmetrically arranged photolithography masks.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: July 12, 2011
    Assignee: Globalfoundries Inc.
    Inventors: Andre Poock, Jan Hoentschel
  • Patent number: 7887978
    Abstract: Mask defects, such as crystal growth defects and the like, may be efficiently detected and estimated at an early stage of their development by generating test images of the mask under consideration and inspecting the images on the basis of wafer inspection techniques in order to identify repeatedly occurring defects. In some illustrative embodiments, the exposure process for generating the mask images may be performed on the basis of different exposure parameters, such as exposure doses, in order to enhance the probability of detecting defects and also estimating the effect thereof depending on the varying exposure parameters. Consequently, increased reliability may be achieved compared to conventional direct mask inspection techniques.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: February 15, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Uwe Griebenow, Martin Mazur, Wolfram Grundke, Andre Poock
  • Publication number: 20100112468
    Abstract: A substrate support system for process tools, such as lithography tools, comprises a configuration in which a local height level adjustment may be accomplished. Thus, upon detecting a non-allowable height level, the corresponding portion of the substrate support surface may be re-adjusted. Hence, the focus conditions of advanced exposure processes may be significantly enhanced, thereby providing superior process results and also increasing tool utilization.
    Type: Application
    Filed: October 7, 2009
    Publication date: May 6, 2010
    Inventors: Andre Poock, Rene Wirtz
  • Publication number: 20090325355
    Abstract: In extremely scaled semiconductor devices, an asymmetric transistor configuration may be established on the basis of tilted implantation processes with increased resist height and/or tilt angles during tilted implantation processes by providing an asymmetric mask arrangement for masked transistor elements. For this purpose, the implantation mask may be shifted by an appropriate amount so as to enhance the overall blocking effect for the masked transistors while reducing any shadowing effect of the implantation masks for the non-masked transistors. The shift of the implantation masks may be accomplished by performing the automatic alignment procedure on the basis of “shifted” target values or by providing asymmetrically arranged photolithography masks.
    Type: Application
    Filed: April 3, 2009
    Publication date: December 31, 2009
    Inventors: Andre Poock, Jan Hoentschel
  • Publication number: 20090274981
    Abstract: Mask defects, such as crystal growth defects and the like, may be efficiently detected and estimated at an early stage of their development by generating test images of the mask under consideration and inspecting the images on the basis of wafer inspection techniques in order to identify repeatedly occurring defects. In some illustrative embodiments, the exposure process for generating the mask images may be performed on the basis of different exposure parameters, such as exposure doses, in order to enhance the probability of detecting defects and also estimating the effect thereof depending on the varying exposure parameters. Consequently, increased reliability may be achieved compared to conventional direct mask inspection techniques.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 5, 2009
    Inventors: Uwe Griebenow, Martin Mazur, Wolfram Grundke, Andre Poock