Patents by Inventor Andre Rainer Stegner
Andre Rainer Stegner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230299147Abstract: Disclosed is a method that includes: measuring at least one characteristic of a superjunction region of a SiC superjunction device, wherein the superjunction region is arranged in a semiconductor body and comprises a plurality of first regions of a first doping type and a plurality of second regions of a second doping type complementary to the first doping type; and generating dopant like defects of one doping type in the superjunction region in a doping process. At least one parameter of the doping process is adjusted dependent on the at least one measured characteristic. The doping process includes an implantation process in which particles are implanted into the semiconductor body to form crystal defects in the semiconductor body in the superjunction region, and an annealing process in order to form the dopant like defects based on the crystal defects.Type: ApplicationFiled: March 15, 2023Publication date: September 21, 2023Inventors: Moriz JELINEK, Jens Peter KONRATH, Hans-Joachim SCHULZE, Andre Rainer STEGNER
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Publication number: 20220199800Abstract: A semiconductor device includes a silicon carbide (SiC) drift zone over a SiC field stop zone and/or a SiC semiconductor substrate. A concentration of Z1/2 defects in the SiC drift zone is at least one order of magnitude smaller than in the SiC field stop zone and/or the SiC semiconductor substrate. Separately or in combination, a concentration of Z1/2 defects in a part of the SiC drift zone is at least one order of magnitude smaller than in another part of the drift zone.Type: ApplicationFiled: March 10, 2022Publication date: June 23, 2022Inventors: Hans-Joachim Schulze, Jens Peter Konrath, Andre Rainer Stegner, Helmut Strack
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Patent number: 11302795Abstract: A method of manufacturing a semiconductor device is proposed. A silicon carbide, SiC, semiconductor body is provided. Ions are introduced into the SiC semiconductor body through a first surface of the SiC semiconductor body by at least one ion implantation process. Thereafter, a SiC device layer is formed on the first surface of the SiC semiconductor body. Semiconductor device elements are formed in or over the SiC device layer.Type: GrantFiled: July 10, 2020Date of Patent: April 12, 2022Assignee: Infineon Technologies AGInventors: Hans-Joachim Schulze, Jens Peter Konrath, Andre Rainer Stegner, Helmut Strack
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Patent number: 11282926Abstract: A semiconductor device includes a SiC body having a first semiconductor area of a first conductivity type and a second semiconductor area of a second conductivity type. The first semiconductor area is electrically contacted with a first surface of the SiC body and forms a pn junction with the second semiconductor area. The first and second semiconductor areas are arranged on one another in a vertical direction perpendicular to the first surface. The first semiconductor area has first and second dopant species. An average dopant concentration of the first dopant species in a first part of the first semiconductor area adjoining the first surface is greater than an average dopant concentration of the second dopant species. An average dopant concentration of the second dopant species in a second part of the first semiconductor area adjoining the second semiconductor area is greater than a dopant concentration of the first dopant species.Type: GrantFiled: March 10, 2020Date of Patent: March 22, 2022Assignee: Infineon Technologies AGInventors: Hans-Joachim Schulze, Wolfgang Bergner, Andre Rainer Stegner
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Patent number: 11264464Abstract: A silicon carbide device includes a transistor cell with a front side doping region, a body region, and a drift region. The body region includes a first portion having a first average net doping concentration and a second portion having a second average net doping concentration. The first portion and the second portion have an extension of at least 50 nm in a vertical direction. The first average net doping concentration is at least two times the second average net doping concentration, and the first average net doping concentration is at least 1·1017 cm?3.Type: GrantFiled: September 19, 2019Date of Patent: March 1, 2022Assignee: INFINEON TECHNOLOGIES AGInventors: Hans-Joachim Schulze, Thomas Basler, Andre Rainer Stegner
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Patent number: 11094779Abstract: An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area and edge. A first semiconductor region of a first conductivity type extends from the active area into the peripheral area. A second semiconductor region of a second conductivity type forms a pn-junction with the first semiconductor region. A first edge termination region of the second conductivity type arranged at the first side adjoins the first semiconductor region, between the second semiconductor region and edge. A second edge termination region of the first conductivity type arranged at the first side and between the first edge termination region and edge has a varying concentration of dopants of the first conductivity type which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region.Type: GrantFiled: April 25, 2017Date of Patent: August 17, 2021Assignee: Infineon Technologies AGInventors: Philip Christoph Brandt, Andre Rainer Stegner, Francisco Javier Santos Rodriguez, Frank Dieter Pfirsch, Hans-Joachim Schulze, Manfred Pfaffenlehner, Thomas Auer
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Patent number: 11063142Abstract: A semiconductor device includes a silicon carbide body that includes a first section and a second section. The first section is adjacent to the second section. A drift region is formed in the first section and the second section. A lattice defect region is in a portion of the drift region in the second section. A first density of lattice defects, which include interstitials and vacancies in the lattice defect region, is at least double a second density of lattice defects, which include interstitials and vacancies in a portion of the drift region outside the lattice defect region.Type: GrantFiled: December 19, 2019Date of Patent: July 13, 2021Assignee: INFINEON TECHNOLOGIES AGInventors: Jens Peter Konrath, Wolfgang Bergner, Christian Hecht, Hans-Joachim Schulze, Andre Rainer Stegner
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Patent number: 10943979Abstract: The disclosure relates to a semiconductor device having a SiC semiconductor body. The SiC semiconductor body includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type. The first semiconductor region is electrically contacted at a first surface of the SiC semiconductor body and forms a pn junction with the second semiconductor region. The first semiconductor region and the second semiconductor region are arranged one above the other in a vertical direction perpendicular to the first surface. The first semiconductor region has a first dopant species and a second dopant species.Type: GrantFiled: February 15, 2019Date of Patent: March 9, 2021Assignee: Infineon Technologies AGInventors: Andre Rainer Stegner, Hans-Joachim Schulze
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Publication number: 20210013320Abstract: A method of manufacturing a semiconductor device is proposed. A silicon carbide, SiC, semiconductor body is provided. Ions are introduced into the SiC semiconductor body through a first surface of the SiC semiconductor body by at least one ion implantation process. Thereafter, a SiC device layer is formed on the first surface of the SiC semiconductor body. Semiconductor device elements are formed in or over the SiC device layer.Type: ApplicationFiled: July 10, 2020Publication date: January 14, 2021Inventors: Hans-Joachim Schulze, Jens Peter Konrath, Andre Rainer Stegner, Helmut Strack
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Publication number: 20200295142Abstract: A semiconductor device includes a SiC body having a first semiconductor area of a first conductivity type and a second semiconductor area of a second conductivity type. The first semiconductor area is electrically contacted with a first surface of the SiC body and forms a pn junction with the second semiconductor area. The first and second semiconductor areas are arranged on one another in a vertical direction perpendicular to the first surface. The first semiconductor area has first and second dopant species. An average dopant concentration of the first dopant species in a first part of the first semiconductor area adjoining the first surface is greater than an average dopant concentration of the second dopant species. An average dopant concentration of the second dopant species in a second part of the first semiconductor area adjoining the second semiconductor area is greater than a dopant concentration of the first dopant species.Type: ApplicationFiled: March 10, 2020Publication date: September 17, 2020Inventors: Hans-Joachim Schulze, Wolfgang Bergner, Andre Rainer Stegner
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Publication number: 20200203513Abstract: A semiconductor device includes a silicon carbide body that includes a first section and a second section. The first section is adjacent to the second section. A drift region is formed in the first section and the second section. A lattice defect region is in a portion of the drift region in the second section. A first density of lattice defects, which include interstitials and vacancies in the lattice defect region, is at least double a second density of lattice defects, which include interstitials and vacancies in a portion of the drift region outside the lattice defect region.Type: ApplicationFiled: December 19, 2019Publication date: June 25, 2020Inventors: Jens Peter KONRATH, Wolfgang BERGNER, Christian HECHT, Hans-Joachim SCHULZE, Andre Rainer STEGNER
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Patent number: 10665687Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body.Type: GrantFiled: March 22, 2017Date of Patent: May 26, 2020Assignee: INFINEON TECHNOLOGIES AGInventors: Hans-Joachim Schulze, Andreas Haertl, Francisco Javier Santos Rodriguez, André Rainer Stegner, Daniel Schloegl
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Publication number: 20200098869Abstract: A silicon carbide device includes a transistor cell with a front side doping region, a body region, and a drift region. The body region includes a first portion having a first average net doping concentration and a second portion having a second average net doping concentration. The first portion and the second portion have an extension of at least 50 nm in a vertical direction. The first average net doping concentration is at least two times the second average net doping concentration, and the first average net doping concentration is at least 1·1017 cm?3.Type: ApplicationFiled: September 19, 2019Publication date: March 26, 2020Inventors: Hans-Joachim SCHULZE, Thomas BASLER, Andre Rainer STEGNER
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Patent number: 10475911Abstract: Some embodiments relate to a semiconductor device that includes a body region of a field effect transistor structure formed in a semiconductor substrate between a drift region of the field effect transistor structure and a source region of the field effect transistor structure. The semiconductor substrate includes chalcogen atoms at an atom concentration of less than 1×1013 cm?3 at a p-n junction between the body region and the drift region, and at least part of the source region includes chalcogen atoms at an atom concentration of greater than 1×1014 cm?3. Additional semiconductor device embodiments and corresponding methods of manufacture are described.Type: GrantFiled: January 22, 2019Date of Patent: November 12, 2019Assignee: Infineon Technologies AGInventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner
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Patent number: 10424636Abstract: A power semiconductor device includes a semiconductor substrate including at least one electrical structure. The at least one electrical structure has a blocking voltage of more than 20V. Further, the power semiconductor device includes an electrically insulating layer structure formed over at least a portion of a lateral surface of the semiconductor substrate. The electrically insulating layer structure embeds one or more local regions for storing charge carriers. Further, the one or more local regions includes in at least one direction a dimension of less than 200 nm.Type: GrantFiled: December 21, 2016Date of Patent: September 24, 2019Assignee: Infineon Technologies AGInventors: Andreas Haertl, Martin Brandt, Andre Rainer Stegner, Martin Stutzmann
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Publication number: 20190259841Abstract: The disclosure relates to a semiconductor device having a SiC semiconductor body. The SiC semiconductor body includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type. The first semiconductor region is electrically contacted at a first surface of the SiC semiconductor body and forms a pn junction with the second semiconductor region. The first semiconductor region and the second semiconductor region are arranged one above the other in a vertical direction perpendicular to the first surface. The first semiconductor region has a first dopant species and a second dopant species.Type: ApplicationFiled: February 15, 2019Publication date: August 22, 2019Inventors: Andre Rainer Stegner, Hans-Joachim Schulze
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Publication number: 20190157438Abstract: Some embodiments relate to a semiconductor device that includes a body region of a field effect transistor structure formed in a semiconductor substrate between a drift region of the field effect transistor structure and a source region of the field effect transistor structure. The semiconductor substrate includes chalcogen atoms at an atom concentration of less than 1×1013 cm?3 at a p-n junction between the body region and the drift region, and at least part of the source region includes chalcogen atoms at an atom concentration of greater than 1×1014 cm?3. Additional semiconductor device embodiments and corresponding methods of manufacture are described.Type: ApplicationFiled: January 22, 2019Publication date: May 23, 2019Inventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner
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Patent number: 10205011Abstract: Some embodiments relate to a method for forming a semiconductor device. The method includes forming a source region of a field effect transistor structure in a semiconductor substrate. The method further includes forming an oxide layer. The method also includes incorporating atoms of at least one atom type of a group of atom types into at least a part of the source region of the field effect transistor structure after forming the oxide layer. The group of atom types includes chalcogen atoms, silicon atoms and argon atoms.Type: GrantFiled: February 12, 2016Date of Patent: February 12, 2019Assignee: Infineon Technologies AGInventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner
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Patent number: 9954068Abstract: A method of forming a transistor having a gate electrode includes forming a sacrificial layer over a semiconductor substrate, forming a patterning layer over the sacrificial layer, patterning the patterning layer to form patterned structures, forming spacers adjacent to sidewalls of the patterned structures, removing the patterned structures, etching through the sacrificial layer using the spacers as an etching mask and etching into the semiconductor substrate, thereby forming trenches in the semiconductor substrate, and filling a conductive material in the trenches in the semiconductor substrate to form the gate electrode.Type: GrantFiled: September 25, 2015Date of Patent: April 24, 2018Assignee: Infineon Technologies AGInventors: Philip Christoph Brandt, Francisco Javier Santos Rodriguez, Andre Rainer Stegner
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Publication number: 20170317165Abstract: An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area and edge. A first semiconductor region of a first conductivity type extends from the active area into the peripheral area. A second semiconductor region of a second conductivity type forms a pn-junction with the first semiconductor region. A first edge termination region of the second conductivity type arranged at the first side adjoins the first semiconductor region, between the second semiconductor region and edge. A second edge termination region of the first conductivity type arranged at the first side and between the first edge termination region and edge has a varying concentration of dopants of the first conductivity type which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region.Type: ApplicationFiled: April 25, 2017Publication date: November 2, 2017Inventors: Philip Christoph Brandt, Andre Rainer Stegner, Francisco Javier Santos Rodriguez, Frank Dieter Pfirsch, Hans-Joachim Schulze, Manfred Pfaffenlehner, Thomas Auer