Patents by Inventor Andre Richter
Andre Richter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250141394Abstract: A solar module that is operable in the extra-low voltage range and includes at least one photovoltaic cell for converting radiant energy into electrical energy and two planar elements made of plastic that sandwich the at least one photovoltaic cell. The solar module has at least one positive contact element and at least one negative contact element for tapping an electrical output voltage of the solar module. The positive contact element and the negative contact element are arranged at least partially between the two planar elements and each include at least one electrically uninsulated exposed contacting portion. A solar module system includes a plurality of solar modules connected in parallel and a bearing structure which electrically interconnects and supports the plurality of solar modules.Type: ApplicationFiled: February 15, 2023Publication date: May 1, 2025Inventors: Andre Richter, Andreas Dreisiebner
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Patent number: 10756469Abstract: An electrical plug (EP) of an electrical plug-in (EPI) connection, including the plug and mating plug (MP), an electrical connection between EPI contacts of the plug contacts (PC) and mating contacts (MC) of the MP occurring when the plug and MP are inserted into each other, including: at least one connector strip (CS) in which EPI contacts, for electrical connection to MCs of the MP, are held by a first end; a free second end (FSE) of the EPI contacts projects away from the CS; a plug-in contact receiving chamber (PCRC) having subchamber bodies (SBs), the FSE of at least one of the EPI contacts projects into each of the SBs; the PCRC being open in the direction of the FSEs of the EPI contacts, the CS and the PCRC being separate components connected to one another, and at least two SBs of the PCRC being connected to one another by an elastic element permitting relative movement of the SBs in a plane perpendicular as to the EPI contacts.Type: GrantFiled: January 4, 2018Date of Patent: August 25, 2020Assignee: KNORR-BREMSE SYSTEME FUER NUTZFAHRZEUGE GMBHInventors: Norbert Behrendt, Joerg Schneider, Andre Richter
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Publication number: 20200028293Abstract: An electrical plug (EP) of an electrical plug-in (EPI) connection, including the plug and mating plug (MP), an electrical connection between EPI contacts of the plug contacts (PC) and mating contacts (MC) of the MP occurring when the plug and MP are inserted into each other, including: at least one connector strip (CS) in which EPI contacts, for electrical connection to MCs of the MP, are held by a first end; a free second end (FSE) of the EPI contacts projects away from the CS; a plug-in contact receiving chamber (PCRC) having subchamber bodies (SBs), the FSE of at least one of the EPI contacts projects into each of the SBs; the PCRC being open in the direction of the FSEs of the EPI contacts, the CS and the PCRC being separate components connected to one another, and at least two SBs of the PCRC being connected to one another by an elastic element permitting relative movement of the SBs in a plane perpendicular as to the EPI contacts.Type: ApplicationFiled: January 4, 2018Publication date: January 23, 2020Inventors: Norbert Behrendt, Joerg Schneider, Andre Richter
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Patent number: 9640486Abstract: The invention relates to a method for marking wafers, in particular wafers for solar cell production: The method comprises the steps of manufacturing a position line (21a, 21b, 21c) on a peripheral surface of a silicon ingot or column, the ingot or column extending in an axial direction and having a longitudinal axis in the axial direction, wherein the position line extends in the axial direction along substantially the whole ingot or column and is inclined with respect to the longitudinal axis. By this position line it is possible to determine the position of a wafer cut from the ingot or column within the ingot or column, respectively. Further, an individual identification pattern (20a, 20b, 20c) of lines on the peripheral surface of the silicon ingot or column is manufactured, the individual identification pattern of lines extending in axial direction over substantially the whole ingot or column and providing an individual coding which allows to identify the silicon ingot or column.Type: GrantFiled: June 13, 2007Date of Patent: May 2, 2017Assignee: Conergy AGInventors: Andre Richter, Marcel Krenzin, Jens Moecke
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Publication number: 20130025673Abstract: Solar cells, where at least one conductor is mechanically and electrically connected to the solar cell and/or further conductors by conductive cladding. The conductive cladding is preferably deposited electrolytically or galvanically from solution or is produced by plasma-spraying. In addition, methods for connecting solar cells by means of at least one conductor and/or for connecting conductors on solar cells, wherein at least one electrically-conductive conductor is mechanically and electrically connected by depositing conductive cladding from solution onto the solar cell and/or at least one conductor.Type: ApplicationFiled: April 1, 2011Publication date: January 31, 2013Applicant: SOMONT GMBHInventors: Egon Huebel, Andre Richter
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Publication number: 20100237514Abstract: The invention relates to a method for marking wafers, in particular wafers for solar cell production: The method comprises the steps of manufacturing a position line (21a, 21b, 21c) on a peripheral surface of a silicon ingot or column, the ingot or column extending in an axial direction and having a longitudinal axis in the axial direction, wherein the position line extends in the axial direction along substantially the whole ingot or column and is inclined with respect to the longitudinal axis. By this position line it is possible to determine the position of a wafer cut from the ingot or column within the ingot or column, respectively. Further, an individual identification pattern (20a, 20b, 20c) of lines on the peripheral surface of the silicon ingot or column is manufactured, the individual identification pattern of lines extending in axial direction over substantially the whole ingot or column and providing an individual coding which allows to identify the silicon ingot or column.Type: ApplicationFiled: June 13, 2007Publication date: September 23, 2010Applicant: Conergy AGInventors: Andre Richter, Marcel Krenzin, Jens Moecke
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Patent number: 6506306Abstract: Wastewater from a chemical-mechanical polishing process (CMP) used in semiconductor chip fabrication has hitherto been, and is still being, discharged into the public sewage system after chemical neutralization and sedimentation. This has the drawback that water consumption is considerable. It is therefore an object of the invention to reduce the total amount of wastewater produced that has to be discharged. This is achieved by the wastewater to be treated being subjected to an ultra-filtration, and at least one of NF an RO. This allows the treated CMP wastewater to be reused within the plant. In particular, it can be recycled in order again to recover therefrom deionized water of a very high purity for operational purposes, e.g. for CMP.Type: GrantFiled: October 28, 1999Date of Patent: January 14, 2003Assignee: Infineon Technologies AGInventors: Jürgen Hammer, Andre Richter, Werner Kraus, Heinz-Dieter Petermann
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Patent number: 6436281Abstract: Wastewater from a chemical-mechanical polishing process (CMP) used in semiconductor chip fabrication has hitherto been, and is still being, discharged into the public sewage system after chemical neutralization and sedimentation. This has the drawback that water consumption is considerable. It is therefore an object of the invention to reduce the total amount of wastewater produced that has to be discharged. This is achieved by the wastewater to be treated being subjected to an ultra-filtration. This allows the treated CMP wastewater to be reused within the plant. In particular, it can be recycled in order again to recover therefrom deionized water of a very high purity for operational purposes, e.g. for CMP.Type: GrantFiled: April 10, 2001Date of Patent: August 20, 2002Assignee: Infineon Technologies AGInventors: Jürgen Hammer, Andre Richter, Werner Kraus, Heinz-Dieter Petermann
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Publication number: 20010017277Abstract: Wastewater from a chemical-mechanical polishing process (CMP) used in semiconductor chip fabrication has hitherto been, and is still being, discharged into the public sewage system after chemical neutralization and sedimentation. This has the drawback that water consumption is considerable. It is therefore an object of the invention to reduce the total amount of wastewater produced that has to be discharged. This is achieved by the wastewater to be treated being subjected to an ultra-filtration. This allows the treated CMP wastewater to be reused within the plant. In particular, it can be recycled in order again to recover therefrom deionized water of a very high purity for operational purposes, e.g. for CMP.Type: ApplicationFiled: April 10, 2001Publication date: August 30, 2001Applicant: Siemens AktiengesellschaftInventors: Jurgen Hammer, Andre Richter, Werner Kraus, Heinz-Dieter Petermann
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Patent number: 6257955Abstract: An apparatus for polishing wafers includes a polishing table with a heating device. A conduit connects a tank holding a liquid polishing agent to a distributor for feeding the liquid polishing agent to the polishing table. A heat exchanger is disposed along the conduit between the tank and the distributor for heating the liquid polishing agent. The heat exchanger is independent of said heating device. A method for heating a polishing agent is also provided.Type: GrantFiled: February 29, 2000Date of Patent: July 10, 2001Assignee: Infineon Technologies AGInventors: Götz Springer, Wolfgang Diewald, Andre Richter