Patents by Inventor Andre Strittmatter

Andre Strittmatter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11870220
    Abstract: A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V < E G 2 applying to the layer (A) and E L - E F < E G 2 applying to the layer (B), with EF the energy position of the Fermi level, EV the energy position of the valence band, EL the energy position of a conduction band and EL?EV the energy difference of the semiconductor band gap EG, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: January 9, 2024
    Assignees: Otto-von-Guericke-Universitaet Magdeburg, AZUR SPACE Solar Power GmbH
    Inventors: Armin Dadgar, André Strittmatter
  • Patent number: 11424596
    Abstract: A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V < E G 2 applying to the layer (A) and E L - E F < E G 2 applying to the layer (B), with EF the energy position of the Fermi level, EV the energy position of the valence band, EL the energy position of a conduction band and EL?EV the energy difference of the semiconductor band gap EG, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 23, 2022
    Assignees: Otto-von-Guericke-Universitaet Magdeburg, AZUR SPACE Solar Power GmbH
    Inventors: Armin Dadgar, André Strittmatter
  • Patent number: 10673207
    Abstract: The invention relates to, inter alia, a light-emitting semiconductor component comprising the following: —a first mirror (102, 202, 302, 402, 502), —a first conductive layer (103, 203, 303, 403, 503), —a light-emitting layer sequence (104, 204, 304, 404, 504) on a first conductive layer face facing away from the first mirror, and—a second conductive layer (105, 205, 305, 405, 505) on a light-emitting layer sequence face facing away from the first conductive layer, wherein—the first mirror, the first conductive layer, the light-emitting layer sequence, and the second conductive layer are based on a III-nitride compound semiconductor material, —the first mirror is electrically conductive, and—the first mirror is a periodic sequence of homoepitaxial materials with varying refractive indices.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: June 2, 2020
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Armin Dadgar, André Strittmatter, Christoph Berger
  • Patent number: 9490608
    Abstract: The invention relates, inter alia, to a method for producing an electro-optical component (10, 200) suitable for emitting electromagnetic radiation (120), wherein in the method a first intermediate layer (60) is applied on a carrier, a second intermediate layer (70) is applied on the first intermediate layer, and after the second intermediate layer has been applied, the buried first intermediate layer is locally modified, wherein as a result of the local modification of the buried first intermediate layer in a lateral direction a refractive index jump is produced which brings about a lateral wave guiding of the electromagnetic radiation (120) in the unmodified region of the first intermediate layer.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: November 8, 2016
    Assignee: TECHNISCHE UNVERSITÄT BERLIN
    Inventors: André Strittmatter, Jan-Hindrik Schulze, Tim David Germann
  • Patent number: 9225145
    Abstract: The invention relates, inter alia, to a method for producing an electro-optical component (10, 200) suitable for emitting electromagnetic radiation (120), wherein in the method a first intermediate layer (60) is applied on a carrier, a second intermediate layer (70) is applied on the first intermediate layer, and after the second intermediate layer has been applied, the buried first intermediate layer is locally modified, wherein as a result of the local modification of the buried first intermediate layer in a lateral direction a refractive index jump is produced which brings about a lateral wave guiding of the electromagnetic radiation (120) in the unmodified region of the first intermediate layer.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 29, 2015
    Assignee: Technische Universität Berlin
    Inventors: André Strittmatter, Jan-Hindrik Schulze, Tim David Germann
  • Patent number: 9166375
    Abstract: A semiconductor light emitting device includes a pump light source, a gain structure, and an out-coupling mirror. The gain structure is comprised of InGaN layers that have resonant excitation absorption at the pump wavelength. Light from the pump light source causes the gain structure to emit light, which is reflected by the out-coupling mirror back to the gain structure. A distributed Bragg reflector causes internal reflection within the gain structure. The out-coupling mirror permits light having sufficient energy to pass therethrough for use external to the device. A frequency doubling structure may be disposed between the gain structure and the out-coupling mirror. Output wavelengths in the deep-UV spectrum may be achieved.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: October 20, 2015
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Andre Strittmatter, Christopher L. Chua, Peter Kiesel, Noble M. Johnson, Joerg Martini
  • Publication number: 20140126597
    Abstract: The invention relates, inter alia, to a method for producing an electro-optical component (10, 200) suitable for emitting electromagnetic radiation (120), wherein in the method a first intermediate layer (60) is applied on a carrier, a second intermediate layer (70) is applied on the first intermediate layer, and after the second intermediate layer has been applied, the buried first intermediate layer is locally modified, wherein as a result of the local modification of the buried first intermediate layer in a lateral direction a refractive index jump is produced which brings about a lateral wave guiding of the electromagnetic radiation (120) in the unmodified region of the first intermediate layer.
    Type: Application
    Filed: June 21, 2012
    Publication date: May 8, 2014
    Inventors: André Strittmatter, Jan-Hindrik Schulze, Tim David Germann
  • Patent number: 8652918
    Abstract: A structure method for producing same provides suppressed lattice defects when epitaxially forming nitride layers over non-c-plane oriented layers, such as a semi-polar oriented template layer or substrate. A patterned mask with “window” openings, or trenches formed in the substrate with appropriate vertical dimensions, such as the product of the window width times the cotangent of the angle between the surface normal and the c-axis direction, provides significant blocking of all diagonally running defects during growth. In addition, inclined posts of appropriate height and spacing provide a blocking barrier to vertically running defects is created. When used in conjunction with the aforementioned aspects of mask windows or trenches, the post structure provides significant blocking of both vertically and diagonally running defects during growth.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: February 18, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Andre Strittmatter
  • Patent number: 8502197
    Abstract: A device including a locally modified buried first layer. A second layer is arranged on top of the first layer. The first layer includes at least one modified section and at least one unmodified section. The modified material of the locally modified buried first layer changes or induces mechanical strain in a portion of the second layer which is arranged above the at least one modified section. At least one nanostructure is placed on top of the second layer in an area, which is located above the at least one unmodified section of the first layer or adjacent thereto, said at least one nanostructure being formed by a strain-sensitive third material deposited on the locally strained second layer.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: August 6, 2013
    Assignee: Technische Universitat Berlin
    Inventors: André Strittmatter, Andrei Schliwa, Tim David Germann, Udo W. Pohl, Vladimir Gaysler, Jan-Hindrik Schulze
  • Publication number: 20130016746
    Abstract: A semiconductor light emitting device includes a pump light source, a gain structure, and an out-coupling mirror. The gain structure is comprised of InGaN layers that have resonant excitation absorption at the pump wavelength. Light from the pump light source causes the gain structure to emit light, which is reflected by the out-coupling mirror back to the gain structure. A distributed Bragg reflector causes internal reflection within the gain structure. The out-coupling mirror permits light having sufficient energy to pass therethrough for use external to the device. A frequency doubling structure may be disposed between the gain structure and the out-coupling mirror. Output wavelengths in the deep-UV spectrum may be achieved.
    Type: Application
    Filed: August 15, 2012
    Publication date: January 17, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Andre Strittmatter, Christopher L. Chua, Peter Kiesel, Noble M. Johnson, Joerg Martini
  • Patent number: 8349712
    Abstract: The invention inter alia relates to a method of fabricating a layer assembly comprising the steps of: arranging a first layer on top of a carrier; arranging a second layer on top of the first layer; locally modifying the material of the buried first layer and providing at least one modified section in the first layer, wherein the modified material changes or induces mechanical strain in a portion of the second layer which is arranged above the at least one modified section; after locally modifying the material of the buried first layer, depositing a third material on top of the second layer, at least one characteristic of the third material being sensitive to the local mechanical strain in the second layer.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: January 8, 2013
    Assignee: Technische Universitat Berlin
    Inventors: André Strittmatter, Andrei Schliwa, Tim David Germann, Udo W. Pohl, Vladimir Gaysler, Jan-Hindrik Schulze
  • Patent number: 8330144
    Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: December 11, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Andre Strittmatter, Noble M. Johnson, Mark Teepe, Christopher L. Chua, Zhihong Yang, John E. Northrup
  • Publication number: 20120280212
    Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Andre Strittmatter, Noble M. Johnson, Mark Teepe, Christopher L. Chua, Zhihong Yang, John E. Northrup
  • Publication number: 20120225541
    Abstract: A structure method for producing same provides suppressed lattice defects when epitaxially forming nitride layers over non-c-plane oriented layers, such as a semi-polar oriented template layer or substrate. A patterned mask with “window” openings, or trenches formed in the substrate with appropriate vertical dimensions, such as the product of the window width times the cotangent of the angle between the surface normal and the c-axis direction, provides significant blocking of all diagonally running defects during growth. In addition, inclined posts of appropriate height and spacing provide a blocking barrier to vertically running defects is created. When used in conjunction with the aforementioned aspects of mask windows or trenches, the post structure provides significant blocking of both vertically and diagonally running defects during growth.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 6, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventor: André Strittmatter
  • Patent number: 8247249
    Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: August 21, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Andre Strittmatter, Noble M. Johnson, Mark Teepe, Christopher L. Chua, Zhihong Yang, John E. Northrup
  • Patent number: 8212287
    Abstract: A structure method for producing same provides suppressed lattice defects when epitaxially forming nitride layers over non-c-plane oriented layers, such as a semi-polar oriented template layer or substrate. A patterned mask with “window” openings, or trenches formed in the substrate with appropriate vertical dimensions, such as the product of the window width times the cotangent of the angle between the surface normal and the c-axis direction, provides significant blocking of all diagonally running defects during growth. In addition, inclined posts of appropriate height and spacing provide a blocking barrier to vertically running defects is created. When used in conjunction with the aforementioned aspects of mask windows or trenches, the post structure provides sign0ificant blocking of both vertically and diagonally running defects during growth.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: July 3, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Andre Strittmatter
  • Patent number: 8143154
    Abstract: A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: March 27, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
  • Patent number: 8143647
    Abstract: A relaxed InGaN template employs a GaN or InGaN nucleation layer grown at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: March 27, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe
  • Publication number: 20110291074
    Abstract: A structure and method for producing same provides a solid-state light emitting device with suppressed lattice defects in epitaxially formed nitride layers over a non-c-plane oriented (e.g., semi-polar) template or substrate. A dielectric layer with “window” openings or trenches provides significant suppression of all diagonally running defects during growth. Posts of appropriate height and spacing may further provide suppression of vertically running defects. A layer including gallium nitride is formed over the dielectric layer, and polished to provide a planar growth surface with desired roughness. A tri-layer indium gallium nitride active region is employed. For laser diode embodiments, a relatively thick aluminum gallium nitride cladding layer is provided over the gallium nitride layer.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 1, 2011
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Andre Strittmatter, Noble M. Johnson, Mark Teepe, Christopher L. Chua, Zhihong Yang, John E. Northrup
  • Publication number: 20110281424
    Abstract: A relaxed InGaN template is formed by growing a GaN or InGaN nucleation layer at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temperatures on the nucleation layer. Although not necessary, the buffer layer is typically undoped, and is usually grown at high pressures to encourage planarization and to improve surface smoothness. A subsequent n-doped cap layer can then be grown at low pressures to form the n-contact of a photonic or electronic device. In some cases, a wetting layer—typically low temperature AlN—is grown prior to the nucleation layer. Other templates, such as AlGaN on Si or SiC, are also produced using the method of the present invention.
    Type: Application
    Filed: July 28, 2011
    Publication date: November 17, 2011
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Christopher L. Chua, Zhihong Yang, Andre Strittmatter, Mark R. Teepe