Abstract: A correction circuit in a digital phase locked loop is disclosed having a first terminal, a second terminal, a value-discretely tunable oscillator, an integrator, a loop filter, and a feedback path. A correction circuit is connected to an input of the integrator on the input side and to an output of the integrator on the output side. The correction circuit generates a correction word derived from an actuating word fed to the input of the integrator and a word derived from the second frequency word. A periodic error component in the frequency setting word output by the integrator can thus be corrected by the correction circuit.

Abstract: A circuit arrangement for determining a frequency drift in a phase locked loop includes a type I phase locked loop having a phase comparator, a charge pump, a loop filter, an oscillator and also a frequency divider in a feedback path of the control loop. A device is coupled to the phase locked loop for the purpose of determining a pulse length of the actuating voltage signal at at least two different times during an operation of the control loop. Furthermore, a computing unit is connected to an output of the device. It is designed for forming a difference between the pulse lengths at the at least two different times, as a result of which a phase and frequency drift of an output signal of the control loop can be determined.