Patents by Inventor Andrea Fantini

Andrea Fantini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040182
    Abstract: Systems, methods, and apparatuses are provided for an asymmetric vertical thin film transistor selector. An apparatus includes first and second source/drain regions formed on a substrate, a channel separating the first source/drain region and the second source/drain region, and a gate separated from the channel by a gate dielectric material. The first source/drain region, the second source/drain region, the channel, and the gate form a vertical thin film transistor, a first end of the channel is coupled to the first source/drain region and extends beyond a first end of the gate, and a second end of the channel is coupled to the second source/drain region and does not extend beyond a second end of the gate that is opposite the first end of the gate. A contact in the substrate is coupled to the first source/drain region and a sense line is coupled to the second source/drain region.
    Type: Application
    Filed: July 23, 2024
    Publication date: January 30, 2025
    Inventors: Paolo Fantini, Andrea Ghetti, Benjamin Chu-Kung, Sara Moon Villa
  • Publication number: 20170346005
    Abstract: A Resistive Random Access Memory (RRAM) device and a method of its manufacture are disclosed. The RRAM device comprises a lower oxygen affinity bottom electrode, a hygroscopic solid-state dielectric layer, comprising hydroxyl groups, and a higher oxygen affinity top electrode. In some embodiments, the hygroscopic solid-state dielectric layer is a rare-earth metal oxide layer.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Ludovic Goux, Andrea Fantini, Chao-Yang Chen
  • Patent number: 7848138
    Abstract: A phase change memory device includes a plurality of cells connected to bitlines and including respective phase change memory elements and cell select devices and an addressing circuit for selectively addressing at least one bitline and one cell connected thereto. A reading column bias circuit supplies a bitline voltage to the addressed bitline and cell. The bitline voltage includes the sum of a safe voltage and a reference select device voltage, wherein the reference voltage is equal to a select device voltage on the select device when a cell current flowing through the phase change memory element and the cell select device is equal to a safe current. The safe voltage and the safe current are such that phase transition of the phase change memory element is prevented in any bias condition including a cell voltage lower than the safe voltage and in any bias condition including the cell current lower than the safe current.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: December 7, 2010
    Assignee: Intel Corporation
    Inventors: Ferdinando Bedeschi, Richard E. Fackenthal, Andrea Fantini
  • Publication number: 20080298122
    Abstract: A phase change memory device includes a plurality of cells connected to bitlines and including respective phase change memory elements and cell select devices and an addressing circuit for selectively addressing at least one bitline and one cell connected thereto. A reading column bias circuit supplies a bitline voltage to the addressed bitline and cell. The bitline voltage includes the sum of a safe voltage and a reference select device voltage, wherein the reference voltage is equal to a select device voltage on the select device when a cell current flowing through the phase change memory element and the cell select device is equal to a safe current. The safe voltage and the safe current are such that phase transition of the phase change memory element is prevented in any bias condition including a cell voltage lower than the safe voltage and in any bias condition including the cell current lower than the safe current.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 4, 2008
    Inventors: Ferdinando Bedeschi, Richard E. Fackenthal, Andrea Fantini
  • Patent number: 5746300
    Abstract: A storage unit for elongated elements, particularly cigarettes, wherein a mass of cigarettes is supported on a first conveyor movable both ways through a loading-unloading station where the first conveyor is connected to a second conveyor by a connecting plate; the first conveyor being defined by a helical conveyor belt presenting at least two longitudinal grooves defining, on the conveyor belt, at least two longitudinal bands, each presenting a respective succession of projections; and the connecting plate presenting a comb-shaped free end connected to the longitudinal grooves of the first conveyor.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: May 5, 1998
    Assignee: G.D Societa' Per Azioni
    Inventors: Marco Brizzi, Andrea Fantini, Antonio Gamberini
  • Patent number: 5212534
    Abstract: In an optical communication system with a passive star coupler, measurement between a station and a central node should not interfere with the operation of other stations. Distance measurement is accomplished by determining the echo delay using a wavelength not being used by other stations. The system uses combined wavelength- and time-division multiplexing. One wavelength is always kept free for measurements if possible. For the measurement, the same data format as that employed during normal operation can be used. Measurement can be continuously repeated unchanged during operation.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: May 18, 1993
    Assignee: Alcatel N.V.
    Inventors: Alessandro Bianchi, Guiseppe Comito, Andrea Fantini