Patents by Inventor Andrea Fantini

Andrea Fantini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240321355
    Abstract: Systems, methods, and apparatus related to memory devices. In one approach, a vertical three-dimensional cross-point memory device uses digit line decoders that include, on the digit line side of memory cells, a current limiter and sensing circuit configured to control program current in either of positive or negative program polarities, as selected by a controller. Two current limiters are each used on the digit line side of each memory cell. A negative polarity current limiter is used for pull-up, and a positive polarity current limiter is used for pull-down. A negative polarity sensing circuit is used between the respective digit line decoder and a positive supply voltage. A positive polarity sensing circuit is used between the respective digit line decoder and a negative supply voltage. The current limiter and sensing circuit pair of the same polarity is coupled to each digit line decoder based on the selected program polarity.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Inventors: Andrea Ghetti, Andrea Martinelli, Efrem Bolandrina, Ferdinando Bedeschi, Paolo Fantini
  • Publication number: 20240304244
    Abstract: Methods, systems, and devices for techniques for parallel memory cell access are described. A memory device may include multiple tiers of memory cells. During a first duration, a first voltage may be applied to a set of word lines coupled with a tier of memory cells to threshold one or more memory cells included in a first subset of memory cells of the tier. During a second duration, a second voltage may be applied to the set of word lines to write a first logic state to the one or more memory cells of the first subset and to threshold one or more memory cells included in a second subset of memory cells of the tier. During a third duration, a third voltage may be applied to the set of word lines to write a second logic state to the one or more memory cells of the second subset.
    Type: Application
    Filed: March 13, 2024
    Publication date: September 12, 2024
    Inventors: Paolo Fantini, Andrea Martinelli, Maurizio Rizzi
  • Publication number: 20170346005
    Abstract: A Resistive Random Access Memory (RRAM) device and a method of its manufacture are disclosed. The RRAM device comprises a lower oxygen affinity bottom electrode, a hygroscopic solid-state dielectric layer, comprising hydroxyl groups, and a higher oxygen affinity top electrode. In some embodiments, the hygroscopic solid-state dielectric layer is a rare-earth metal oxide layer.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Ludovic Goux, Andrea Fantini, Chao-Yang Chen
  • Patent number: 7848138
    Abstract: A phase change memory device includes a plurality of cells connected to bitlines and including respective phase change memory elements and cell select devices and an addressing circuit for selectively addressing at least one bitline and one cell connected thereto. A reading column bias circuit supplies a bitline voltage to the addressed bitline and cell. The bitline voltage includes the sum of a safe voltage and a reference select device voltage, wherein the reference voltage is equal to a select device voltage on the select device when a cell current flowing through the phase change memory element and the cell select device is equal to a safe current. The safe voltage and the safe current are such that phase transition of the phase change memory element is prevented in any bias condition including a cell voltage lower than the safe voltage and in any bias condition including the cell current lower than the safe current.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: December 7, 2010
    Assignee: Intel Corporation
    Inventors: Ferdinando Bedeschi, Richard E. Fackenthal, Andrea Fantini
  • Publication number: 20080298122
    Abstract: A phase change memory device includes a plurality of cells connected to bitlines and including respective phase change memory elements and cell select devices and an addressing circuit for selectively addressing at least one bitline and one cell connected thereto. A reading column bias circuit supplies a bitline voltage to the addressed bitline and cell. The bitline voltage includes the sum of a safe voltage and a reference select device voltage, wherein the reference voltage is equal to a select device voltage on the select device when a cell current flowing through the phase change memory element and the cell select device is equal to a safe current. The safe voltage and the safe current are such that phase transition of the phase change memory element is prevented in any bias condition including a cell voltage lower than the safe voltage and in any bias condition including the cell current lower than the safe current.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 4, 2008
    Inventors: Ferdinando Bedeschi, Richard E. Fackenthal, Andrea Fantini
  • Patent number: 5746300
    Abstract: A storage unit for elongated elements, particularly cigarettes, wherein a mass of cigarettes is supported on a first conveyor movable both ways through a loading-unloading station where the first conveyor is connected to a second conveyor by a connecting plate; the first conveyor being defined by a helical conveyor belt presenting at least two longitudinal grooves defining, on the conveyor belt, at least two longitudinal bands, each presenting a respective succession of projections; and the connecting plate presenting a comb-shaped free end connected to the longitudinal grooves of the first conveyor.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: May 5, 1998
    Assignee: G.D Societa' Per Azioni
    Inventors: Marco Brizzi, Andrea Fantini, Antonio Gamberini
  • Patent number: 5212534
    Abstract: In an optical communication system with a passive star coupler, measurement between a station and a central node should not interfere with the operation of other stations. Distance measurement is accomplished by determining the echo delay using a wavelength not being used by other stations. The system uses combined wavelength- and time-division multiplexing. One wavelength is always kept free for measurements if possible. For the measurement, the same data format as that employed during normal operation can be used. Measurement can be continuously repeated unchanged during operation.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: May 18, 1993
    Assignee: Alcatel N.V.
    Inventors: Alessandro Bianchi, Guiseppe Comito, Andrea Fantini