Abstract: Disclosed herein is a regulator for a non-volatile memory. The regulator comprises a high voltage supply terminal, a low voltage supply terminal, an output terminal, a ground terminal and an internal node. The regulator further comprises an input amplifier inserted between the low voltage supply terminal and the ground terminal and outputting a first output voltage at a first intermediate output node according to a reference voltage and a feedback voltage provided at its negative and positive input terminals, respectively; a mirror circuit forming two current paths between the internal node and the ground terminal and between the internal node and a second intermediate output node respectively; and a cascode block coupled between the high voltage supply terminal and the internal node and operating in response to a voltage at the second intermediate output node of the regulator where the two current path is formed by the mirror circuit.

Abstract: Disclosed herein is a regulator for a non-volatile memory. The regulator comprises a high voltage supply terminal, a low voltage supply terminal, an output terminal, a ground terminal and an internal node. The regulator further comprises an input amplifier inserted between the low voltage supply terminal and the ground terminal and outputting a first output voltage at a first intermediate output node according to a reference voltage and a feedback voltage provided at its negative and positive input terminals, respectively; a mirror circuit forming two current paths between the internal node and the ground terminal and between the internal node and a second intermediate output node respectively; and a cascode block coupled between the high voltage supply terminal and the internal node and operating in response to a voltage at the second intermediate output node of the regulator where the two current path is formed by the mirror circuit.