Patents by Inventor Andrea Pinos

Andrea Pinos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916169
    Abstract: An active matrix LED array precursor forming a precursor to a micro LED array is provided. The active matrix LED array precursor comprises a common first semiconducting layer comprising a substantially undoped Group III-nitride, a plurality of transistor-driven LED precursors, and a common source contact. Each transistor-driven LED precursor comprises a monolithic light emitting diode (LED) structure comprising a plurality of III-nitride semiconducting layers, a barrier semiconducting layer, and a gate contact. Each monolithic LED structure is formed on a portion of the common semiconducting layer. The barrier semiconducting is layer formed on a portion of the common semiconducting layer encircling the LED structure and configured to induce a two-dimensional electron channel layer at the interface between the common semiconducting layer and the barrier semiconducting layer. The gate contact is formed over a portion of the two-dimensional electron channel layer, the gate contact encircling the LED structure.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 27, 2024
    Assignee: Plessey Semiconductors Limited
    Inventors: Andrea Pinos, Samir Mezouari
  • Publication number: 20240038927
    Abstract: A colour conversion resonator system, comprising: a first partially reflective region configured to transmit light of a first primary peak wavelength and to reflect light of a second primary peak wavelength; a second partially reflective region configured to at least partially transmit light of the first and second primary peak wavelengths and to reflect light of a third primary peak wavelength; a third partially reflective region configured to at least partially reflect light with the third primary peak wavelength; a first colour conversion resonator cavity arranged to receive input light with the first primary peak wavelength through the first partially reflective region and to convert at least some of the light of the first primary peak wavelength to provide light of the second primary peak wavelength, wherein the first colour conversion resonator cavity is arranged such that the second primary peak wavelength resonates in the first colour conversion resonator cavity and resonant light with the second prim
    Type: Application
    Filed: October 10, 2022
    Publication date: February 1, 2024
    Inventors: Jun-Youn Kim, Anwer Saeed, Andrea Pinos, Mohsin Aziz, Ian Murray, Abdul Shakoor
  • Publication number: 20240021759
    Abstract: A light source includes a substrate, an array of semiconductor structures grown on the substrate, and multi-color micro-LEDs grown on surfaces of the array of semiconductor structures. Each semiconductor structure of the array of semiconductor structures has a shape of a truncated pyramid. The light source includes multiple sets of micro-LEDs formed on top surfaces of multiple sets of semiconductor structures of the array of semiconductor structures, or formed on the top surfaces and/or multiple sidewall surfaces of the array of semiconductor structures. The multiple sets of micro-LEDs are configured to emit light of multiple colors.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN, John Lyle WHITEMAN
  • Publication number: 20240006460
    Abstract: A light emitting diode structure comprising: a p-type region; an n-type region; a gate contact; a first light emitting region for recombination of carriers injectable by the p-type region and the n-type region; and a second light emitting region for recombination of carriers injectable by the p-type region and the n-type region, wherein the first light emitting region and the second light emitting region at least partially overlap to form a light emitting surface associated with the first light emitting region and the second light emitting region; wherein the p-type region is at least partially formed in a first channel through the first light emitting region and the second light emitting region, and the n-type region is at least partially formed in a second channel through the first light emitting region and the second light emitting region, wherein the light emitting device is configured such that the wavelength of light emitted by the light emitting surface is controllable by varying a gate voltage applied
    Type: Application
    Filed: November 24, 2021
    Publication date: January 4, 2024
    Inventors: Andrea Pinos, Wei Sin Tan, Samir Mezouari
  • Patent number: 11841508
    Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs), an array of micro-lenses, and a bonding layer bonding the array of micro-lenses to the array of micro-LEDs. Each micro-LED of the array of micro-LEDs includes a first mesa structure formed in a plurality of semiconductor layers. The array of micro-lenses is bonded to a first semiconductor layer of the plurality of semiconductor layers by the bonding layer. The first semiconductor layer includes an array of second mesa structures formed therein. The first mesa structure and the second mesa structure are on opposite sides of the plurality of semiconductor layers. Each second mesa structure of the array of second mesa structures is aligned with a respective micro-lens of the array of micro-lenses and the first mesa structure of a respective micro-LED of the array of micro-LEDs.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: December 12, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Samir Mezouari, Andrea Pinos, Wei Sin Tan, John Lyle Whiteman
  • Publication number: 20230369535
    Abstract: A light source includes an array of core-shell nanowire micro-LEDs. Each core-shell nanowire micro-LED includes: a first semiconductor epitaxial layer including a nanowire core formed therein; a first dielectric material layer in physical contact with and surrounding sidewalls of a bottom portion of the nanowire core, or in physical contact with a bottom surface of the nanowire core; a second dielectric material layer in physical contact with a top surface of the nanowire core; active layers grown only on sidewalls of the nanowire core and configured to emit visible light; and a second semiconductor layer grown on the active layers, where the nanowire core and the second semiconductor layer are oppositely doped.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 16, 2023
    Inventors: Wei Sin TAN, Andrea PINOS, Samir MEZOUARI
  • Publication number: 20230369549
    Abstract: A colour conversion resonator system, comprising: a partially reflective region configured to transmit light of a first primary peak wavelength and to reflect light of a second primary peak wavelength; a further partially reflective region configured to at least partially reflect light with the second primary peak wavelength; and a colour conversion resonator cavity comprising at least one quantum well, wherein the colour conversion resonator cavity is arranged to: receive input light with the first primary peak wavelength through the partially reflective region; and convert, by the at least one quantum well, at least some of the received input light to provide light of the second primary peak wavelength such that light of the second primary peak wavelength resonates in the cavity and light with the resonant second primary peak wavelength is output through the further partially reflective region, wherein the at least one quantum well is placed to coincide with an antinode of the colour conversion resonator ca
    Type: Application
    Filed: October 22, 2021
    Publication date: November 16, 2023
    Inventors: Jun-Youn Kim, Anwer Saeed, Andrea Pinos, Mohsin Aziz, Ian Murray, Abdul Shakoor
  • Publication number: 20230352466
    Abstract: A light source includes a backplane including electrical circuits fabricated thereon, an array of micro-light emitting diodes (micro-LEDs) bonded to the backplane and configured to emit visible light, and an array of micro-lenses aligned with the array of micro-LEDs and configured to collimate the visible light emitted by the array of micro-LEDs. Each micro-lens of the array of micro-lenses has a plurality of discrete thickness levels. A pitch of the array of micro-lenses is equal to or less than about 5 ?m, such as about 2 ?m. The pitch of the array of micro-lenses can be the same as or different from the pitch of the array of micro-LEDs.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Inventors: Robert Leslie BREAKSPEAR, Samir MEZOUARI, Andrea PINOS, Wei Sin TAN
  • Publication number: 20230333379
    Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs), an array of micro-lenses, and a bonding layer bonding the array of micro-lenses to the array of micro-LEDs. Each micro-LED of the array of micro-LEDs includes a first mesa structure formed in a plurality of semiconductor layers. The array of micro-lenses is bonded to a first semiconductor layer of the plurality of semiconductor layers by the bonding layer. The first semiconductor layer includes an array of second mesa structures formed therein. The first mesa structure and the second mesa structure are on opposite sides of the plurality of semiconductor layers. Each second mesa structure of the array of second mesa structures is aligned with a respective micro-lens of the array of micro-lenses and the first mesa structure of a respective micro-LED of the array of micro-LEDs.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN, John Lyle WHITEMAN
  • Publication number: 20230282680
    Abstract: A light source includes an array of micro-light emitting diodes (micro-LEDs) configured to emit light, a first semiconductor layer on the array of micro-LEDs and including porous structures formed therein to diffuse the light emitted by the array of micro-LEDs, and a second semiconductor layer on the first semiconductor layer. The second semiconductor layer includes a flat surface opposing the first semiconductor layer and is configured to couple the light diffused by the porous structures out of the light source through the flat surface.
    Type: Application
    Filed: February 18, 2022
    Publication date: September 7, 2023
    Inventors: Andrea PINOS, Wei Sin TAN, Samir MEZOUARI, Jonathan David Neale SHIPP, Steven Ramos CARNEIRO, Keith Richard STRICKLAND
  • Publication number: 20230282789
    Abstract: A light source comprises a backplane wafer with electrical circuits fabricated thereon, and an array of LEDs coupled to the backplane wafer. Each LED of the array of LEDs comprises a mesa structure including semiconductor epitaxial layers and characterized by inwardly tilted mesa sidewalls, a high-refractive index material region (e.g., with a refractive index greater than about 1.75, such as equal to or greater than a refractive index of the semiconductor epitaxial layers) surrounding the semiconductor epitaxial layers of the mesa structure and including outwardly tilted sidewalls, and a reflective layer on the outwardly tilted sidewalls of the high-refractive index material region. In one example, each LED of the array of LEDs also include a passivation layer on the inwardly tilted mesa sidewalls of the mesa structure.
    Type: Application
    Filed: February 25, 2022
    Publication date: September 7, 2023
    Inventors: Wei Sin TAN, Andrea PINOS, Samir MEZOUARI, Kathleen Bonnie VINDEN, John Lyle WHITEMAN
  • Publication number: 20230238479
    Abstract: A method of forming a strain relaxation layer in an epitaxial crystalline structure, the method comprising: providing a crystalline template layer comprising a material with a first natural relaxed in-plane lattice parameter; forming a first epitaxial crystalline layer on the crystalline template layer, wherein the first epitaxial crystalline layer has an initial electrical conductivity that is higher than the electrical conductivity of the crystalline template layer; forming a second epitaxial crystalline layer on the first epitaxial crystalline layer, wherein the second epitaxial crystalline layer has an electrical conductivity lower than the initial electrical conductivity of the first epitaxial crystalline layer and comprises a material with a second natural relaxed in-plane lattice parameter that is different to the first natural relaxed in-plane lattice parameter of the crystalline template layer; forming pores in the first epitaxial crystalline layer by electrochemical etching of the first epitaxial cr
    Type: Application
    Filed: July 14, 2021
    Publication date: July 27, 2023
    Inventors: Andrea Pinos, WeiSin Tan, Samir Mezouari, John Lyle Whiteman, Xiang Yu, Jun-Youn Kim
  • Publication number: 20230238421
    Abstract: A method of manufacturing a LED precursor and a LED precursor is provided. The LED precursor is manufactured by forming a monolithic growth stack having a growth surface and forming a monolithic LED stack on the growth surface. The monolithic growth stack comprises a first semiconducting layer comprising a Group III-nitride, a second semiconducting layer, and third semi-conducting layer. The second semiconducting layer comprises a first Group III-nitride including a donor dopant such that the second semiconducting layer has a donor density of at least 5×1018 cm-3. The second semiconducting layer has an areal porosity of at least 15% and a first in-plane lattice constant. The third semiconducting layer comprises a second Group III-nitride different to the first Group-III-nitride.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 27, 2023
    Applicant: PLESSEY SEMICONDUCTORS LIMITED
    Inventors: Andrea PINOS, Wei Sin TAN, Jun Youn KIM, Xiang YU, Simon ASHTON, Samir MEZOUARI
  • Publication number: 20230223421
    Abstract: A monolithic LED array precursor comprising a plurality of LED structures sharing a first semiconductor layer, wherein the first semiconductor layer defines a plane of the LED array precursor, each LED structure comprising (i) a second semiconductor layer on the first semiconductor layer, having an upper surface portion parallel to the plane of the LED array precursor, the second semiconductor layer having a regular trapezoidal cross-section normal to the upper surface portion, such that the second semiconductor layer has sloped sides, (ii) a third semiconductor layer on the second semiconductor layer, having an upper surface portion parallel to the plane of the LED array precursor, the third semiconductor layer having a regular trapezoidal cross-section normal to the upper surface portion, such that the third semiconductor layer has sloped sides parallel to the sloped sides of the second semiconductor layer, (iii) a fourth semiconductor layer on the third semiconductor layer, having an upper surface portion
    Type: Application
    Filed: May 28, 2021
    Publication date: July 13, 2023
    Inventors: Andrea Pinos, Samir Mezouari, WeiSin Tan, John Lyle Whiteman
  • Publication number: 20230207606
    Abstract: Disclosed herein are techniques for extracting and collimating light emitted by a light emitting diode (LED). According to certain embodiments, a device includes an LED configured to emit light in a first wavelength range, and an angle-dependent optical filter optically coupled to the LED. A transmission (or reflection) wavelength range of the angle-dependent optical filter varies with an angle of incidence (AOI) of the light incident on the angle-dependent optical filter, such that the angle-dependent optical filter transmits most of light emitted from the LED and having small AOIs, and reflects most of light emitted from the LED and having large AOIs, thereby reducing the divergence angle of the emitted light.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 29, 2023
    Inventors: Samir MEZOUARI, Andrea PINOS, Wei Sin TAN
  • Publication number: 20230207753
    Abstract: A method of forming an optical device, the method comprising the steps of forming spacers on the substantially vertical sidewalls of a sacrificial mesa, the spacers being formed from a first electrically insulating, optically transparent material, and having an internal face contacting the mesa, and a second opposing external face; depositing a reflective, electrically conducting material so as to form a mirror layer on the external face of the spacers; removing the sacrificial mesa so as to form a pocket between the internal faces of the spacers; installing a die having substantially vertical sidewalls into the pocket between the internal faces of the spacers.
    Type: Application
    Filed: May 28, 2021
    Publication date: June 29, 2023
    Inventors: Andrea Pinos, Samir Mezouari, WeiSin Tan, John Lyle Whiteman
  • Patent number: 11688829
    Abstract: A light emitting diode (LED) device includes a substrate and a plurality of mesa structures. Each mesa structure includes a layer of a first semiconductor material, a porous layer of the first semiconductor material on the layer of the first semiconductor material, and a layer of a second semiconductor material on the porous layer. The porous layer is characterized by an areal porosity ?15%. The second semiconductor material is characterized by a lattice constant greater than a lattice constant of the first semiconductor material. Each mesa structure also includes an active region on the layer of the second semiconductor material and configured to emit red light, a p-contact layer on the active region, a dielectric layer on sidewalls of the p-contact layer and the active region, and an n-contact layer in physical contact with at least a portion of sidewalls of the layer of the second semiconductor material.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: June 27, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Wei Sin Tan, Andrea Pinos, John Lyle Whiteman
  • Publication number: 20230187421
    Abstract: A light emitting device array is provided. The light emitting device array comprises a light emitting stack, a first electrical contact layer, an array of second electrical contacts, and an anti-reflection layer. The light emitting stack has a light emitting surface and a contact surface. The light emitting surface and the contact surface define opposing sides of the light emitting stack. The light emitting stack comprises a plurality of Group III-nitride layers including a first semiconducting layer provided towards the light emitting surface of the light emitting stack, a second semiconducting layer provided towards the contact surface, and an active layer arranged between the first semiconducting layer and the second semiconducting layer, the active layer configured to generate light having a first wavelength. The light emitting surface and the contact surface are parallel to each other and aligned with the plurality of Group III-nitride layers.
    Type: Application
    Filed: May 18, 2021
    Publication date: June 15, 2023
    Applicant: PLESSEY SEMICONDUCTORS LIMITED
    Inventors: Andrea Pinos, Samir Mezouari
  • Publication number: 20230187591
    Abstract: A method includes obtaining a first wafer including a first substrate and epitaxial layers that include a first semiconductor layer, a light-emitting region, and a second semiconductor layer; bonding a second substrate to the second semiconductor layer on the first wafer; removing the first substrate from the first wafer to expose the first semiconductor layer; depositing a reflector layer on the first semiconductor layer; forming a first metal bonding layer on the reflector layer; bonding a second metal bonding layer on a backplane wafer to the first metal bonding layer; removing the second substrate to expose the second semiconductor layer; and etching through the second semiconductor layer, the light-emitting region, the first semiconductor layer, the reflector layer, the first metal bonding layer, and the second metal bonding layer to form an array of mesa structures for an array of micro-light emitting diodes.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 15, 2023
    Inventors: Wei Sin TAN, Andrea PINOS, Samir MEZOUARI, John Lyle WHITEMAN
  • Publication number: 20230187592
    Abstract: A method of forming a display comprising: bonding a backplane comprising a plurality of backplane electrical contacts to a monolithic light emitting diode structure comprising a corresponding plurality of electrical contacts, wherein bonding comprises forming a reversible bond between at least one of the plurality of backplane electrical contacts and a corresponding electrical contact of the monolithic light emitting diode structure; and removing material from the monolithic light emitting diode structure to provide a plurality of physically isolated light emitting diode dies, thereby to enable removal and/or replacement of at least one physically isolated light emitting diode die by reversing the reversible bond between the at least one of the plurality of backplane electrical contacts and the corresponding electrical contact of the monolithic light emitting diode structure.
    Type: Application
    Filed: June 21, 2021
    Publication date: June 15, 2023
    Inventors: Samir Mezouari, Andrea Pinos, WeiSin Tan