Patents by Inventor Andreas Allmeier

Andreas Allmeier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230341311
    Abstract: The application relates to a semiconductor device for particle measurement having a cavity housing and a MEMS chip arranged inside the cavity housing. The housing includes a first opening, via which the cavity is connected to the surroundings and in which a first grating is arranged, which is capable by setting it to a first electrical potential of attracting particles from the surroundings and/or electrically charging them. The MEMS chip includes a membrane facing toward the first opening, which is capable by setting it to a second electrical potential of attracting particles. The application furthermore relates to a method for operating a semiconductor device having a cavity housing and a MEMS chip arranged inside the cavity housing.
    Type: Application
    Filed: April 17, 2023
    Publication date: October 26, 2023
    Inventors: Klaus ELIAN, Ludwig HEITZER, Fabian MERBELER, Matthias EBERL, Thomas MÜLLER, Andreas ALLMEIER, Derek DEBIE, Cyrus GHAHREMANI, Jens POHL, Christian IRRGANG
  • Publication number: 20230194478
    Abstract: A radiation source device includes at least one membrane layer, a radiation source structure to emit electromagnetic or infrared radiation, a substrate and a spacer structure, wherein the substrate and the at least one membrane form a chamber, wherein a pressure in the chamber is lower than or equal to a pressure outside of the chamber, and wherein the radiation source structure is arranged between the at least one membrane layer and the substrate.
    Type: Application
    Filed: October 27, 2022
    Publication date: June 22, 2023
    Inventors: Derek Debie, Klaus Elian, Ludwig Heitzer, David Tumpold, Jens Pohl, Cyrus Ghahremani, Thorsten Meyer, Christian Geissler, Andreas Allmeier
  • Patent number: 11024565
    Abstract: A semiconductor device includes a die paddle, a plurality of electrically conductive leads extending away from the die paddle, and an adhesion promoter plating material selectively formed on the electrically conductive leads such that outer portions of the leads are covered by the adhesion promoter plating material, and interior portions of the leads that are disposed between the die paddle and the respective outer portions of each lead are substantially devoid of the adhesion promoter plating material.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: June 1, 2021
    Assignee: Infineon Technologies AG
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Alang Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Publication number: 20190237396
    Abstract: A semiconductor device includes a die paddle, a plurality of electrically conductive leads extending away from the die paddle, and an adhesion promoter plating material selectively formed on the electrically conductive leads such that outer portions of the leads are covered by the adhesion promoter plating material, and interior portions of the leads that are disposed between the die paddle and the respective outer portions of each lead are substantially devoid of the adhesion promoter plating material.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 1, 2019
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Alang Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Patent number: 10297536
    Abstract: A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away from the die paddle. A first one of the unit lead frames is plated with an adhesion promoter plating material within a package outline area of the first unit lead frame. The package outline area includes one of the die paddles and interior portions of the leads. Wire bond sites are processed in the first unit lead frame before or after the plating of the first lead frame such that, after the plating of the first lead frame. The wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area at an end of the interior portions of the leads that is closest to the die paddle.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: May 21, 2019
    Assignee: Infineon Technologies AG
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Alang Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Publication number: 20170271245
    Abstract: A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames have a die paddle and a plurality of leads extending away from the die paddle. A first one of the unit lead frames is plated with an adhesion promoter plating material within a package outline area of the first unit lead frame. The package outline area includes one of the die paddles and interior portions of the leads. Wire bond sites are processed in the first unit lead frame before or after the plating of the first lead frame such that, after the plating of the first lead frame. The wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area at an end of the interior portions of the leads that is closest to the die paddle.
    Type: Application
    Filed: May 25, 2017
    Publication date: September 21, 2017
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Alang Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Patent number: 9704786
    Abstract: A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames includes a die paddle, a plurality of leads extending away from the die paddle, and a peripheral ring delineating interior portions of the leads from exterior portions of the leads. An adhesion promoter plating material is selectively plated within a package outline area of a first unit lead frame. The die paddle and the interior portions of the leads are disposed within the package outline area and the exterior portions of the leads are disposed outside of the package outline area. Wire bond sides are processed such that, after selectively plating the adhesion promoter plating material, the wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area and are spaced apart from the peripheral ring.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: July 11, 2017
    Assignee: Infineon Technologies AG
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Aland Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Publication number: 20170092569
    Abstract: A lead frame strip having a plurality of unit lead frames is provided. Each of the unit lead frames includes a die paddle, a plurality of leads extending away from the die paddle, and a peripheral ring delineating interior portions of the leads from exterior portions of the leads. An adhesion promoter plating material is selectively plated within a package outline area of a first unit lead frame. The die paddle and the interior portions of the leads are disposed within the package outline area and the exterior portions of the leads are disposed outside of the package outline area. Wire bond sides are processed such that, after selectively plating the adhesion promoter plating material, the wire bond sites are substantially devoid of the adhesion promoter plating material. The wire bond sites are disposed within the package outline area and are spaced apart from the peripheral ring.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Jochen Dangelmaier, Kim Huat Hoa, Hazrul Alang Abd Hamid, Andreas Allmeier, Dietmar Lang
  • Publication number: 20160282212
    Abstract: A molded semiconductor package includes a substrate having opposing first and second main surfaces, a semiconductor die attached to the first main surface of the substrate, an adhesion adapter attached to the second main surface of the substrate or a surface of the semiconductor die facing away from the substrate, and a mold compound encapsulating the semiconductor die, the adhesion adapter and at least part of the substrate. The adhesion adapter is configured to adapt adhesion properties of the mold compound to adhesion properties of the substrate or semiconductor die to which the adhesion adapter is attached, such that the mold compound more strongly adheres to the adhesion adapter than directly to the substrate or semiconductor die to which the adhesion adapter is attached. The adhesion adapter has a surface feature which strengthens the adhesion between the adhesion adapter and the mold compound.
    Type: Application
    Filed: March 25, 2015
    Publication date: September 29, 2016
    Inventors: Sebastian Beer, Helmut Wietschorke, Jochen Dangelmaier, Horst Theuss, Bernhard Knott, Thomas Mueller, Andreas Allmeier