Abstract: The invention relates to a cylinder sleeve (2) for lining the cylindrical wall of a cylinder (A1) of an internal combustion engine. The inventive sleeve (2) comprises an inner wall (3) which is intended to guide a piston in translation and an outer wall (4) which is intended to rest on the cylindrical wall of the cylinder. The outer wall (4) of the sleeve of the cylinder (2) comprises an upper part (6) which is flared toward a top edge (5) of the sleeve (2), which is defined between the inner (3) and outer (4) walls of the cylinder sleeve. The invention also relates to a cylinder block of an internal combustion engine, comprising at least two cylinders (A1, B1) which are each equipped with one such cylinder sleeve.

Abstract: A clock data recovery circuit includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to receive data and a clock signal and to detect transitions in the data and provide a first signal based on the clock signal and the transitions in the data. The second circuit is configured to receive the first signal and provide a first shift signal based on the first signal. The third circuit is configured to receive the first shift signal, wherein the first circuit, the second circuit, and the third circuit are configured to form a first circuit loop and the third circuit is configured to disable the first circuit loop and shift the clock signal based on the first shift signal.

Abstract: A signal converter circuit including an input circuit and an output circuit. The input circuit is configured to receive current mode logic signals and provide differential input signals based on the current mode logic signals. The output circuit is configured to receive the differential input signals and provide rail-to-rail output signals based on the differential input signals. The output circuit is configured to switch the rail-to-rail output signals in response to a common edge type in each of the differential input signals.

Abstract: A clock data recovery circuit includes a first circuit, a second circuit, and a third circuit. The first circuit is configured to receive data and a clock signal and to detect transitions in the data and provide a first signal based on the clock signal and the transitions in the data. The second circuit is configured to receive the first signal and provide a first shift signal based on the first signal. The third circuit is configured to receive the first shift signal, wherein the first circuit, the second circuit, and the third circuit are configured to form a first circuit loop and the third circuit is configured to disable the first circuit loop and shift the clock signal based on the first shift signal.

Abstract: A method for demodulating a voltage which has been ASK modulated by changing the amplitude between a low level and a high level, in particular for use during contactless data transmission from a card reader/writer to a smart card, is described. The method is distinguished, in that, in an initialization phase, a first mean value is produced from the high voltage level and a stored partial voltage derived therefrom in order to detect a change to a low voltage level. The change to the low voltage level represents a start value and is detected by a subsequent comparison of the modulated voltage with the first mean value. In a subsequent demodulation phase, a second mean value is produced from the detected low voltage level and the high voltage level in order to demodulate the modulated voltage by comparing the modulated voltage with the second mean value.

Abstract: A method for demodulating a voltage which has been ASK modulated by changing the amplitude between a low level and a high level, in particular for use during contactless data transmission from a card reader/writer to a smart card, is described. The method is distinguished, in that, in an initialization phase, a first mean value is produced from the high voltage level and a stored partial voltage derived therefrom in order to detect a change to a low voltage level. The change to the low voltage level represents a start value and is detected by a subsequent comparison of the modulated voltage with the first mean value. In a subsequent demodulation phase, a second mean value is produced from the detected low voltage level and the high voltage level in order to demodulate the modulated voltage by comparing the modulated voltage with the second mean value.