Patents by Inventor Andreas Bolm

Andreas Bolm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Devices and methods for operating a computing system comprising a data relay
    Patent number: 11757781
    Abstract: A computing system includes a computing device and an input data path connecting an interface device to the computing device. The input data path has at least two data relays and at least one buffer memory temporarily storing data. Each of the data relays has first and second terminals and a central terminal and selectively interconnects the first and central terminals or the second and central terminals and leaves the first and second terminals constantly separated from each other. The first terminal of a first relay is connected to the interface device, and the second terminal is connected to the computing device. The central terminal of the first data relay is connected to the buffer memory. The intermediate buffer memory is selectively connected by the first data relay solely to the interface device or the second terminal of the first data relay, but not to both simultaneously.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: September 12, 2023
    Assignee: Siemens Mobility GmbH
    Inventors: Frank Aust, Andreas Bolm
  • DEVICES AND METHODS FOR OPERATING A COMPUTING SYSTEM COMPRISING A DATA RELAY
    Publication number: 20220353188
    Abstract: A computing system includes a computing device and an input data path connecting an interface device to the computing device. The input data path has at least two data relays and at least one buffer memory temporarily storing data. Each of the data relays has first and second terminals and a central terminal and selectively interconnects the first and central terminals or the second and central terminals and leaves the first and second terminals constantly separated from each other. The first terminal of a first relay is connected to the interface device, and the second terminal is connected to the computing device. The central terminal of the first data relay is connected to the buffer memory. The intermediate buffer memory is selectively connected by the first data relay solely to the interface device or the second terminal of the first data relay, but not to both simultaneously.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 3, 2022
    Inventors: Frank Aust, Andreas Bolm