Patents by Inventor Andreas Daniel Stricker

Andreas Daniel Stricker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Matching of bipolar transistor pair through electrical stress
    Patent number: 9568538
    Abstract: A method for matching a pair of matched bipolar transistors in an integrated circuit is disclosed. Within a device, it is determined which transistor is a correctable transistor of the pair of bipolar transistors. The correctable transistor is the transistor of the pair of bipolar transistors having a chosen characteristic which when electrically stressed will converge with a chosen characteristic of the other transistor of the pair of bipolar transistors. The pair of bipolar transistors are matched by electrically stressing the correctable transistor of the bipolar transistors.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: February 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Ephrem G Gebreselasie, Alain Loiseau, Joseph M Lukaitis, Richard Antoine Poro, Andreas Daniel Stricker, Kimball Watson
  • Bipolar transistor structure with a shallow isolation extension region providing reduced parasitic capacitance
    Patent number: 6864560
    Abstract: A bipolar vertical transistor is formed in a silicon semiconductor substrate which has an upper surface with STI regions formed therein composed of a dielectric material formed in the substrate having inner ends and top surfaces. A doped collector region is formed in the substrate between a pair of the STI regions. A counterdoped intrinsic base region is formed on the upper surface of the substrate between the pair of the STI regions with a margin between the intrinsic base region and the pair of STI regions, the intrinsic base region having edges. A doped emitter region is formed above the intrinsic base region spaced away from the edges. A shallow isolation extension region composed of a dielectric material is next to the edges of the intrinsic base region formed in the margin between the STI regions and the intrinsic base region.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Marwan H. Khater, Jae-Sung Rieh, Andreas Daniel Stricker, Gregory Gower Freeman, Kathryn Turner Schonenberg
  • BIPOLAR TRANSISTOR STRUCTURE AND METHODS USING SHALLOW ISOLATION EXTENSION TO REDUCE PARASITIC CAPACITANCE
    Publication number: 20040188797
    Abstract: A bipolar vertical transistor is formed in a silicon semiconductor substrate which has an upper surface with STI regions formed therein composed of a dielectric material formed in the substrate having inner ends and top surfaces. A doped collector region is formed in the substrate between a pair of the STI regions. A counterdoped intrinsic base region is formed on the upper surface of the substrate between the pair of the STI regions with a margin between the intrinsic base region and the pair of STI regions, the intrinsic base region having edges. A doped emitter region is formed above the intrinsic base region spaced away from the edges. A shallow isolation extension region composed of a dielectric material is next to the edges of the intrinsic base region formed in the margin between the STI regions and the intrinsic base region.
    Type: Application
    Filed: March 28, 2003
    Publication date: September 30, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Marwan H. Khater, Jae-Sung Rieh, Andreas Daniel Stricker, Gregory Gower Freeman, Kathryn Turner Schonenberg