Abstract: An automated magazine loading device having an ammunition hopper adapted to receive a firearm cartridge and a conveyor coupled to the ammunition hopper. The conveyor is configured to transport the firearm cartridge to a projectile indexer located in proximity to the conveyor and the conveyor is configured to deposit the firearm cartridge into the projectile indexer in a first orientation. The projectile indexer is configured to reorient the firearm cartridge into a second orientation. The projectile indexer also includes a port for receiving a magazine therein. Finally, the automated magazine loading device includes an actuator for engaging the firearm cartridge and inserting the firearm cartridge into the magazine.

Abstract: A method of trust provisioning a device, including: receiving, by a hardware security module (HSM), a list of instructions configured to produce trust provisioning information; performing, by the HSM, a constraint check on the list of instructions including performing a symbolic execution of the list of instructions; receiving confidential inputs; executing, by the HSM, the list of instructions on the confidential inputs when the list of instructions passes the constraint check; outputting, by the HSM, trust provisioning information.

Abstract: A method of trust provisioning a device, including: receiving, by a hardware security module (HSM), a list of instructions configured to produce trust provisioning information; performing, by the HSM, a constraint check on the list of instructions including performing a symbolic execution of the list of instructions; receiving confidential inputs; executing, by the HSM, the list of instructions on the confidential inputs when the list of instructions passes the constraint check; outputting, by the HSM, trust provisioning information.

Abstract: A method for matching a pair of matched bipolar transistors in an integrated circuit is disclosed. Within a device, it is determined which transistor is a correctable transistor of the pair of bipolar transistors. The correctable transistor is the transistor of the pair of bipolar transistors having a chosen characteristic which when electrically stressed will converge with a chosen characteristic of the other transistor of the pair of bipolar transistors. The pair of bipolar transistors are matched by electrically stressing the correctable transistor of the bipolar transistors.

Abstract: Continuous hydrosilylation of compounds (A) bearing C—C multiple bonds by means of silicon compounds (B) having Si—H groups, in which the reaction components (A) and (B) are reacted continuously in an integrated loop-tube reactor, with reaction mixture being conveyed from the tube into the loop and back again so that a section of the tube is part of the loop circuit, provides a highly controllable reaction process with high product yields.

Abstract: Continuous hydrosilylation of compounds (A) bearing C—C multiple bonds by means of silicon compounds (B) having Si—H groups, in which the reaction components (A) and (B) are reacted continuously in an integrated loop-tube reactor, with reaction mixture being conveyed from the tube into the loop and back again so that a section of the tube is part of the loop circuit, provides a highly controllable reaction process with high product yields.

Abstract: A bipolar vertical transistor is formed in a silicon semiconductor substrate which has an upper surface with STI regions formed therein composed of a dielectric material formed in the substrate having inner ends and top surfaces. A doped collector region is formed in the substrate between a pair of the STI regions. A counterdoped intrinsic base region is formed on the upper surface of the substrate between the pair of the STI regions with a margin between the intrinsic base region and the pair of STI regions, the intrinsic base region having edges. A doped emitter region is formed above the intrinsic base region spaced away from the edges. A shallow isolation extension region composed of a dielectric material is next to the edges of the intrinsic base region formed in the margin between the STI regions and the intrinsic base region.

Abstract: A bipolar vertical transistor is formed in a silicon semiconductor substrate which has an upper surface with STI regions formed therein composed of a dielectric material formed in the substrate having inner ends and top surfaces. A doped collector region is formed in the substrate between a pair of the STI regions. A counterdoped intrinsic base region is formed on the upper surface of the substrate between the pair of the STI regions with a margin between the intrinsic base region and the pair of STI regions, the intrinsic base region having edges. A doped emitter region is formed above the intrinsic base region spaced away from the edges. A shallow isolation extension region composed of a dielectric material is next to the edges of the intrinsic base region formed in the margin between the STI regions and the intrinsic base region.

Abstract: Electronic circuits utilize dynamic bus partitioning to reduce power consumption. An electronic circuit includes several functional electronic blocks, a bus interconnecting the functional blocks, one or more electronically controllable switches partitioning the bus into bus segments and a switch controller. Each of the electronically controllable switches has an on state wherein two of the bus segments are interconnected and an off state wherein the two bus segments are isolated. The switch controller controls the states of the switches in response to control information representative of the source and the destination of each bus transaction. The switch controller may dynamically change the states of the switches between transactions of a sequence of bus transactions. In another embodiment, the switch controller may control the states of the switches to permit two or more bus transactions to be performed simultaneously.