Abstract: A circuit arrangement for charge integration may include an input for applying a signal representing charge pulses, an output for providing an integrated signal, and an integrating circuit connected between the input and the output, comprising a resistive circuit and a capacitor and having an RC time constant which is a function of the resistive circuit and the capacitor. The circuit arrangement may include a feedback control circuit connected at its input, to the output of the circuit arrangement and providing, at its output, a control signal, where at least one of the resistive circuit and the capacitor has a variable value based on the control signal.

Abstract: An optoelectronic device comprises a first semiconductor layer of a first conductivity having a front side and a backside. A second semiconductor layer of a second conductivity is arranged on the front side of the first semiconductor layer, and further comprises a first semiconductor region and a second semiconductor region forming a photodiode in the second semiconductor layer. A signal path electrically connects the photodiode to a fixed potential.

Abstract: A charge sensitive amplifier circuit for sensor frontend comprises an input node to be connected to a sensor to receive an input charge, and an output node to be connected to a charge conversion circuit. The charge sensitive amplifier circuit comprises a first transfer switch located between the input node and the output node to transfer the input charge to the output node. The charge sensitive amplifier circuit further comprises a second transfer switch located in parallel to the first transfer switch between the input node and the output node to transfer the input charge to the output node.

Abstract: An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.

Abstract: A charge sensitive amplifier circuit for sensor frontend comprises an input node to be connected to a sensor to receive an input charge, and an output node to be connected to a charge conversion circuit. The charge sensitive amplifier circuit comprises a first transfer switch located between the input node and the output node to transfer the input charge to the output node. The charge sensitive amplifier circuit further comprises a second transfer switch located in parallel to the first transfer switch between the input node and the output node to transfer the input charge to the output node.

Abstract: A circuit arrangement for charge integration may include an input for applying a signal representing charge pulses, an output for providing an integrated signal, and an integrating circuit connected between the input and the output, comprising a resistive circuit and a capacitor and having an RC time constant which is a function of the resistive circuit and the capacitor. The circuit arrangement may include a feedback control circuit connected at its input, to the output of the circuit arrangement and providing, at its output, a control signal, where at least one of the resistive circuit and the capacitor has a variable value based on the control signal.

Abstract: An optoelectronic device comprises a first semiconductor layer of a first conductivity having a front side and a backside. A second semiconductor layer of a second conductivity is arranged on the front side of the first semiconductor layer, and further comprises a first semiconductor region and a second semiconductor region forming a photodiode in the second semiconductor layer. A signal path electrically connects the photodiode to a fixed potential.

Abstract: An image sensor includes a multitude of photodiodes and analog-to-digital converters disposed in adjacent first and second portions of a semiconductor substrate. The photodiodes exhibit X-ray radiation tolerance. An arrangement of several image sensors in adjacent rows can be used for an X-ray detector in a computed tomography apparatus.

Abstract: An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.

Abstract: The assembly comprises a semiconductor device with an active-pixel array, a readout circuit chip or plurality of readout circuit chips mounted outside the active-pixel array, the readout circuit chip or plurality of readout circuit chips being configured to read out voltages or currents provided by the active-pixel array, and electric connections between the active-pixel array and the readout circuit chip or plurality of readout circuit chips.

Abstract: An image sensor includes a multitude of photodiodes and analog-to-digital converters disposed in adjacent first and second portions of a semiconductor substrate. The photodiodes exhibit X-ray radiation tolerance. An arrangement of several image sensors in adjacent rows can be used for an X-ray detector in a computed tomography apparatus.

Abstract: The assembly comprises a semiconductor device with an active-pixel array, a readout circuit chip or plurality of readout circuit chips mounted outside the active-pixel array, the readout circuit chip or plurality of readout circuit chips being configured to read out voltages or currents provided by the active-pixel array, and electric connections between the active-pixel array and the readout circuit chip or plurality of readout circuit chips.

Abstract: An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second differential stage and the second complementary differential stage are symmetrically connected to form respective first, second, third and fourth current paths. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors are coupled to a respective pair of input terminals.

Abstract: The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.

Abstract: An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second differential stage and the second complementary differential stage are symmetrically connected to form respective first, second, third and fourth current paths. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors are coupled to a respective pair of input terminals.

Abstract: An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

Abstract: The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.

Abstract: An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1?) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3?) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.

Abstract: An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

Abstract: A delta-sigma modulator (10) comprises a modulator loop (11) and a code generator (12). The modulator loop (11) comprises a loop filter (18). The code generator (12) is configured to generate a generator signal (BS) that is realized as an extended Barker code. The code generator (12) comprises a generator output (23) that is coupled to the loop filter (18).