Patents by Inventor Andreas Geiler

Andreas Geiler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250370953
    Abstract: A responder bus node includes a communication interface and a processor unit. The communication interface is configured to receive a data frame from a commander bus node and send a stored response data frame to the commander bus node. The processor unit is configured to evaluate the data frame in order to determine a command and a message index, and execute a function identified by the command, with this function providing one or more data words as a function response if the command is not a no operation command. The processor unit is configured to produce a new response data frame having a header field, containing the message index, and a payload field containing at least the function response, update the stored response data frame with the new response data frame, and output a logic signal indicating that the stored response data frame is ready for transfer.
    Type: Application
    Filed: May 21, 2025
    Publication date: December 4, 2025
    Inventors: Rainer FINDENIG, Andreas GEILER, Thomas FRITZ, Bernhard GRESLEHNER-NIMMERVOLL, Thomas LANGSCHWERT
  • Patent number: 9740837
    Abstract: An apparatus and corresponding method for preventing cloning of code. The apparatus includes a memory, an authentication module, and a device. The memory is configured to store the code, which includes unencrypted code and a fragment of encrypted code. The authentication module is configured to receive and decrypt the fragment of encrypted code from the memory into a fragment of decrypted code, and to store the fragment of decrypted code in an authentication module buffer. The device configured to execute the unencrypted code from the memory and to execute the fragment of decrypted code from the authentication module buffer, wherein the fragment of encrypted code is personalized to the device.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: August 22, 2017
    Assignee: Infineon Technologies AG
    Inventors: Witold Gora, Andreas Geiler, Gerd Dirscherl, Albrecht Mayer
  • Publication number: 20160042160
    Abstract: An apparatus and corresponding method for preventing cloning of code. The apparatus includes a memory, an authentication module, and a device. The memory is configured to store the code, which includes unencrypted code and a fragment of encrypted code. The authentication module is configured to receive and decrypt the fragment of encrypted code from the memory into a fragment of decrypted code, and to store the fragment of decrypted code in an authentication module buffer. The device configured to execute the unencrypted code from the memory and to execute the fragment of decrypted code from the authentication module buffer, wherein the fragment of encrypted code is personalized to the device.
    Type: Application
    Filed: August 6, 2014
    Publication date: February 11, 2016
    Inventors: Witold Gora, Andreas Geiler, Gerd Dirscherl, Albrecht Mayer
  • Patent number: 8390320
    Abstract: Some embodiments of the present disclosure relate to dynamic hardware pad control that is triggered by an intelligent hardware module that monitors an operational state of an IC pin. This hardware module then provides a control signal, which is based on the operational state of the IC pin, to a multiplexer control block that selects one of several different configurations for the IC pin. Because the control signal is provided by the hardware module, the techniques disclosed herein allow precise switching between a number of different IC pin configurations in a fast and efficient manner.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: March 5, 2013
    Assignee: Infineon Technologies AG
    Inventors: Andreas Jansen, Andreas Geiler
  • Publication number: 20120229163
    Abstract: Some embodiments of the present disclosure relate to dynamic hardware pad control that is triggered by an intelligent hardware module that monitors an operational state of an IC pin. This hardware module then provides a control signal, which is based on the operational state of the IC pin, to a multiplexer control block that selects one of several different configurations for the IC pin. Because the control signal is provided by the hardware module, the techniques disclosed herein allow precise switching between a number of different IC pin configurations in a fast and efficient manner.
    Type: Application
    Filed: March 10, 2011
    Publication date: September 13, 2012
    Applicant: Infineon Technologies AG
    Inventors: Andreas Jansen, Andreas Geiler