Abstract: Processor/memory co-exploration at multiple abstraction levels. An architecture description language (ADL) description of a processor/memory system is accessed. The ADL description models on one of a plurality of abstraction levels. The abstraction levels may include a functional (or bit-accurate) level and a cycle-accurate level. Further, a communication protocol for the processor/memory system is accessed. The communication protocol is formed from primitives, wherein a memory interface formed from the primitives is useable in simulation at the abstraction levels. A processor/memory simulation model is automatically generated from the description and description of the communication protocol. The processor/memory simulation model comprises a processor/memory interface comprising the primitives and based on the communication protocol. The memory interface allows simulation of the processor/memory on the appropriate abstraction level for the simulation.

Abstract: A method and system for the automatic generation of user guides. Specifically, the method of the present invention includes accessing an abstract processor model of a processor, wherein said abstract processor model is represented using a hierarchical architecture description language (ADL). The abstract processor model includes a plurality of instructions arranged in a hierarchical structure. An internal representation of the abstract processor model is generated by flattening the abstract processor model. The flattening process generates a plurality of rules grouped by common convergent instructions. Each rule describes an instruction path through the hierarchical structure that converges at a corresponding convergent instruction. An instruction-set documentation is automatically generated from the plurality of rules, wherein the instruction-set documentation is arranged convergent instruction by convergent instruction.

Abstract: A method of automatically extracting information from an architecture description. A memory resident directed acyclic graph data structure comprising nodes representing instructions and edges whose weights represent dependencies between pairs of instructions is constructed. A list of ready nodes are maintained in the directed acyclic graph. A list of nodes not scheduled is maintained. And, it is determined whether the next instruction to be scheduled is to be taken from the list of ready nodes or from the list of nodes not yet scheduled.

Abstract: A computer implemented method of generating a compiler description from an architecture description. Information is automatically extracted from an architecture description that is usable in a description of an architecture described by the architecture description. The extracted information is imported into a program comprising a graphical user interface that accepts user provided additional information that is usable in the compiler description. User provided additional information is accessed that is usable in the compiler description. A compiler description is automatically generated for the architecture described by the architecture description, based on the automatically extracted information and the accessed user provided additional information.

Abstract: A computer implemented method for reducing input performed in a commerce based application is provided. The method includes receiving a sequence of input values from an input device and associating the sequence of input values with an object in the application based on the sequence. A context of the application is determined. One or more tasks in the application are automatically performed based on the object, the context and the sequence of input values.

Abstract: A method of simulating a program. Compiled and interpretive techniques are combined into a just-in-time cached compiled technique. When an instruction of a program simulation is to be executed at run-time, a table of compiled instructions is accessed to determine whether compiled data for the instruction is stored in the table. If the compiled data is not therein, the instruction is compiled and stored in the table. The compiled data is returned to a simulator that is executing the program simulation. In another embodiment, before storing new information in the table, another table may be consulted to determine if the location to which the new information is to be stored is protected. If the table location is protected, the new information is not stored in the table. Rather, the new information is simply passed on to the simulator.

Abstract: A method and system for the automatic generation of user guides. Specifically, the method of the present invention includes accessing an abstract processor model of a processor, wherein said abstract processor model is represented using a hierarchical architecture description language (ADL). The abstract processor model includes a plurality of instructions arranged in a hierarchical structure. An internal representation of the abstract processor model is generated by flattening the abstract processor model. The flattening process generates a plurality of rules grouped by common convergent instructions. Each rule describes an instruction path through the hierarchical structure that converges at a corresponding convergent instruction. An instruction-set documentation is automatically generated from the plurality of rules, wherein the instruction-set documentation is arranged convergent instruction by convergent instruction.

Abstract: A process for working a contour on at least one workpiece using a robot includes positioning the workpiece relative to the robot; acquiring an actual position of the workpiece; acquiring a real course of the contour on the workpiece at predefined points using at least one sensor; and actuating the robot according to individual vectors so as to correct a robot motion during the working of the contour.

Abstract: Processor/memory co-exploration at multiple abstraction levels. An architecture description language (ADL) description of a processor/memory system is accessed. The ADL description models on one of a plurality of abstraction levels. The abstraction levels may include a functional (or bit-accurate) level and a cycle-accurate level. Further, a communication protocol for the processor/memory system is accessed. The communication protocol is formed from primitives, wherein a memory interface formed from the primitives is useable in simulation at the abstraction levels. A processor/memory simulation model is automatically generated from the description and description of the communication protocol. The processor/memory simulation model comprises a processor/memory interface comprising the primitives and based on the communication protocol. The memory interface allows simulation of the processor/memory on the appropriate abstraction level for the simulation.

Abstract: The present invention relates to a photovoltaic solar module, a process for the preparation thereof, and a device for generating electric energy employing such a solar module. The photovoltaic solar module has a wholly or partly surrounding frame of polyurethane which is characterized in that said frame has an elongation at break of at least 50%, a modulus of elasticity of at least 30 N/mm2 and a coefficient of thermal expansion of up to ?=80×10?6/K, the modulus of elasticity and the coefficient of thermal expansion each being measured parallel to the edges of the module.

Abstract: A pullout guide comprising: a stationary guide rail; a slide rail movably mounted on the stationary guide rail, the slide rail configured to be pre-tensioned by a self-retractor formed as a driver and movable along a curve guide; and the curve guide being formed by a slot in a metal sheet.

Abstract: A method and system for marking a location with a mobile device, uploading location information from the marked location to a location based service, creating a web page for the location information, and adding descriptive content to the web page pertaining to the location.

Abstract: A method and system for marking a location with a mobile device, uploading location information from the marked location to a location based service, creating a web page for the location information, and adding descriptive content to the web page pertaining to the location.

Abstract: Processor/memory co-exploration at multiple abstraction levels. An architecture description language (ADL) description of a processor/memory system is accessed. The ADL description models on one of a plurality of abstraction levels. The abstraction levels may include a functional (or bit-accurate) level and a cycle-accurate level. Further, a communication protocol for the processor/memory system is accessed. The communication protocol is formed from primitives, wherein a memory interface formed from the primitives is useable in simulation at the abstraction levels. A processor/memory simulation model is automatically generated from the description and description of the communication protocol. The processor/memory simulation model comprises a processor/memory interface comprising the primitives and based on the communication protocol. The memory interface allows simulation of the processor/memory on the appropriate abstraction level for the simulation.

Abstract: A method and system for marking a location with a mobile device, uploading location information from the marked location to a location based service, creating a web page for the location information, and adding descriptive content to the web page pertaining to the location.

Abstract: A method of simulating a program. Compiled and interpretive techniques are combined into a just-in-time cached compiled technique. When an instruction of a program simulation is to be executed at run-time, a table of compiled instructions is accessed to determine whether compiled data for the instruction is stored in the table. If the compiled data is not therein, the instruction is compiled and stored in the table. The compiled data is returned to a simulator that is executing the program simulation. In another embodiment, before storing new information in the table, another table may be consulted to determine if the location to which the new information is to be stored is protected. If the table location is protected, the new information is not stored in the table. Rather, the new information is simply passed on to the simulator.

Abstract: A method of simulating a program. Compiled and interpretive techniques are combined into a just-in-time cached compiled technique. When an instruction of a program simulation is to be executed at run-time, a table of compiled instructions is accessed to determine whether compiled data for the instruction is stored in the table. If the compiled data is not therein, the instruction is compiled and stored in the table. The compiled data is returned to a simulator that is executing the program simulation. In another embodiment, before storing new information in the table, another table may be consulted to determine if the location to which the new information is to be stored is protected. If the table location is protected, the new information is not stored in the table. Rather, the new information is simply passed on to the simulator.

Abstract: A method and system for the automatic generation of instruction-set manuals. Specifically, the method of the present invention includes accessing an abstract processor model of a processor, wherein said abstract processor model is represented using a hierarchical architecture description language (ADL). The abstract processor model includes a plurality of instructions arranged in a hierarchical structure. An internal representation of the abstract processor model is generated by flattening the abstract processor model. The flattening process generates a plurality of rules grouped by common convergent instructions. Each rule describes an instruction path through the hierarchical structure that converges at a corresponding convergent instruction. An instruction-set documentation is automatically generated from the plurality of rules, wherein the instruction-set documentation is arranged convergent instruction by convergent instruction.

Abstract: A computer implemented method for reducing input performed in a commerce based application is provided. The method includes receiving a sequence of input values from an input device and associating the sequence of input values with an object in the application based on the sequence. A context of the application is determined One or more tasks in the application are automatically performed based on the object, the context and the sequence of input values.

Abstract: A pull-out guide for furniture includes a guide rail configured to be mounted on a furniture body and at least one sliding rail displaceably mounted via rolling elements on the guide rail. The rolling elements are held in a rolling element cage, which cage includes a lubricant-containing material.