Abstract: A high frequency multi-layer printed circuit board, according to the present invention, comprises a through connection having an impedance adapting structure surrounding the through connection and enabling an adjustment of the characteristic impedance of the through connection to a desired value. Thus, high frequency signals may be led through the printed circuit board with reduced signal deformation. The high frequency multi-layer printed circuit board is applicable for high frequency signals up to the GHz-range.

Abstract: An integrated circuit comprises an ESD protection circuit including an inductor coupled between an input terminal and a ground terminal at which an RF signal is applied. The inductor is designed so as to provide a sufficient current capability required in typical ESD events. Moreover, the inductance of the inductor is selected to define, in combination with any parasitic capacitance present, a resonance tank with a resonant frequency that is matched to the RF signal. Accordingly, the operating frequency of the integrated circuit is not limited by the ESD protection circuit. In a further embodiment, an output terminal is ESD protected by an inductor that is coupled to an auxiliary voltage serving to bias an output transistor. Moreover, clamping elements, such as diodes, are provided between the auxiliary voltage and the supply voltage and between the auxiliary voltage and ground potential.

Abstract: A high frequency multi-layer printed circuit board, according to the present invention, comprises a through connection having an impedance adapting structure surrounding the through connection and enabling an adjustment of the characteristic impedance of the through connection to a desired value. Thus, high frequency signals may be led through the printed circuit board with reduced signal deformation. The high frequency multi-layer printed circuit board is applicable for high frequency signals up to the GHz-range.

Abstract: A tunable constant GM circuit allows to compensate for temperature and process variations with high precision by correspondingly adjusting a resistance value and/or the ratio of transistor widths. Thus, in switched capacitor circuits the frequency behaviour, such as the settling time, may be controlled by providing a compensated bias to the transconductance amplifiers typically used in these circuits.

Abstract: A package for packaging a semiconductor die is provided that increases the reliability of packaged semiconductor circuits in particular in high frequency applications where both analog and digital signals are used. The package comprises a first die attach paddle which is connectable to a first part of a bottom surface of the semiconductor die, and a second die attach paddle which is connectable to a second part of the bottom surface of the semiconductor die. The first and second die attach paddles are each made of an electrically conductive material, and are electrically separated from each other. Further, a corresponding semiconductor device and a method of fabricating a package and packaging a semiconductor die are provided. When packaging dies having analog and digital circuits, separate grounds not only on the chip but also in the package can be achieved so that cross talking problems can be effectively reduced.

Abstract: A tunable constant GM circuit allows to compensate for temperature and process variations with high precision by correspondingly adjusting a resistance value and/or the ratio of transistor widths. Thus, in switched capacitor circuits the frequency behaviour, such as the settling time, may be controlled by providing a compensated bias to the transconductance amplifiers typically used in these circuits.

Abstract: An integrated circuit comprises an ESD protection circuit including an inductor coupled between an input terminal and a ground terminal at which an RF signal is applied. The inductor is designed so as to provide a sufficient current capability required in typical ESD events. Moreover, the inductance of the inductor is selected to define, in combination with any parasitic capacitance present, a resonance tank with a resonant frequency that is matched to the RF signal. Accordingly, the operating frequency of the integrated circuit is not limited by the ESD protection circuit. In a further embodiment, an output terminal is ESD protected by an inductor that is coupled to an auxiliary voltage serving to bias an output transistor. Moreover, clamping elements, such as diodes, are provided between the auxiliary voltage and the supply voltage and between the auxiliary voltage and ground potential.

Abstract: A package for packaging a semiconductor die is provided that increases the reliability of packaged semiconductor circuits in particular in high frequency applications where both analog and digital signals are used. The package comprises a first die attach paddle which is connectable to a first part of a bottom surface of the semiconductor die, and a second die attach paddle which is connectable to a second part of the bottom surface of the semiconductor die. The first and second die attach paddles are each made of an electrically conductive material, and are electrically separated from each other. Further, a corresponding semiconductor device and a method of fabricating a package and packaging a semiconductor die are provided. When packaging dies having analog and digital circuits, separate grounds not only on the chip but also in the package can be achieved so that cross talking problems can be effectively reduced.