Abstract: A microprocessor system (50) for controlling or regulating at least partly safety-critical processes, comprising two central processing units (1, 2) integrated in a chip housing, a first and a second bus system, at least one full memory (7) on the first bus system, at least one test data store (51) on the second bus system, which has a reduced store coverage compared to the full memory on the first bus system and in which test data are stored which are connected to data of the memory (7) on the first bus system, and the bus systems comprise comparison and/or driver components which allow the data interchange and/or comparison of data between the two bus systems, and a hardware test data generator (4) is arranged at least on the second bus system, in which case at least part of the full memory on the first bus is additionally backed up using another test data store (5) and test data on the first bus. The invention further relates to the use of the above microprocessor system in motor vehicle controllers.