Abstract: The aqueous alkaline cleaning composition comprising (A) at least one thioamino acid having at least one secondary or tertiary amino group and at least one mercapto group and (B) at least one quaternary ammonium hydroxide; the use of the alkaline cleaning composition for the processing of substrates useful for fabricating electrical and optical devices; and a method for processing substrates useful for fabricating electrical and optical devices making use of the said aqueous alkaline cleaning composition.

Abstract: A liquid composition free from N-alkylpyrrolidones and hydroxyl amine and its derivatives, having a dynamic shear viscosity at 50° C. of from 1 to 10 mPas as measured by rotational viscometry and comprising based on the complete weight of the composition, (A) of from 40 to 99.95% by weight of a polar organic solvent exhibiting in the presence of dissolved tetramethylammonium hydroxide (B) a constant removal rate at 50° C. for a 30 nm thick polymeric barrier anti-reflective layer containing deep UV absorbing chromophoric groups, (B) of from 0.05 to <0.5% of a quaternary ammonium hydroxide, and (C) <5% by weight of water; method for its preparation, a method for manufacturing electrical devices and its use for removing negative-tone and positive-tone photoresists and post etch residues in the manufacture of 3D Stacked Integrated Circuits and 3D Wafer Level Packagings by way of patterning Through Silicon Vias and/or by plating and bumping.

Abstract: A liquid composition comprising (A) at least one polar organic solvent, selected from the group consisting of solvents exhibiting in the presence of from 0.06 to 4% by weight of dissolved tetramethylammonium hydroxide (B), the weight percentage being based on the complete weight of the respective test solution (AB), a constant removal rate at 50° C. for a 30 nm thick polymeric barrier anti-reflective layer containing deep UV absorbing chromophoric groups, (B) at least one quaternary ammonium hydroxide, and (C) at least one aromatic amine containing at least one primary amino group, a method for its preparation and a method for manufacturing electrical devices, employing the liquid composition as a resist stripping composition and its use for removing negative-tone and positive-tone photoresists and post etch residues in the manufacture of 3D Stacked Integrated Circuits and 3D Wafer Level Packagings by way of patterning Through Silicon Vias and/or by plating and bumping.

Abstract: The present invention relates to a composition for post chemical-mechanical polishing (CMP) cleaning. The composition is alkaline, which can remove azole-type corrosion inhibitors on the wafer surface after CMP. This composition can effectively remove azole compounds, increase wettability of the Cu surface, and significantly improve the defect removal after CMP.

Abstract: The present invention concerns a method of making a porous material comprising the following steps in the order a-b-c-d: (a) reacting at least one organosilane (A) with water in the presence of a solvent (C) to form a polymeric material, (b) subjecting said polymeric material to a first heat treatment, (c) bringing said polymeric material into contact with at least one dehydroxylation agent (D), (d) subjecting said polymeric material to electromagnetic radiation and/or to a further heat treatment. The present invention furthermore concerns the porous material obtainable by the inventive method, semiconductor devices and electronic components comprising said porous material, and the use of said material for electrical insulation and in microelectronic devices, membranes, displays and sensors.

Abstract: The invention relates to a dielectric layer with a permittivity of 3.5 or less comprising a dielectric obtainable by polymerizing at least one twin monomer comprising a) a first monomer unit which comprises a metal or semimetal, and b) a second monomer unit which is connected to the first monomer unit via a chemical bond, wherein the polymerization involves polymerizing the twin monomer with breakage of the chemical bond and formation of a first polymer comprising the first monomer unit and of a second polymer comprising the second monomer unit, and wherein the first and the second monomer unit polymerize via a common mechanism.

Abstract: A method of preparing a coating solution, comprising the steps of providing a first solution comprising a lower alcohol; a polyethylene glycol; a complexing agent; and water; providing a second solution comprising a higher alcohol; and at least one metal alkoxide, wherein the metal in said at least one metal alkoxide is selected from the group consisting of zirconium, aluminium, titanium, tantalum and yttrium; forming a sol-gel solution by mixing said first and second solutions and thereby hydrolyzing said at least one metal alkoxide to a metal oxide and an alcohol; forming a concentrated solution by removing said lower alcohol and the alcohol resulting from the hydrolysis of said at least one metal alkoxide; and forming a coating solution by adding a medium alcohol to said concentrated solution.

Abstract: A method of preparing a coating solution, comprising the steps of providing a first solution comprising a lower alcohol; a polyethylene glycol; a complexing agent; and water; providing a second solution comprising a higher alcohol; and at least one metal alkoxide, wherein the metal in said at least one metal alkoxide is selected from the group consisting of zirconium, aluminium, titanium, tantalum and yttrium; forming a sol-gel solution by mixing said first and second solutions and thereby hydrolyzing said at least one metal alkoxide to a metal oxide and an alcohol; forming a concentrated solution by removing said lower alcohol and the alcohol resulting from the hydrolysis of said at least one metal alkoxide; and forming a coating solution by adding a medium alcohol to said concentrated solution.

Abstract: The present invention relates to a method of fabricating a groove-like structure in a semiconductor device including etching a trench in a substrate, filling the trench with a spin-on-glass liquid forming a spin-on-glass liquid layer containing a solvent, baking the spin-on-glass liquid layer in order to remove the solvent and forming a baked layer, etching the baked layer to a predetermined depth using an etchant that provides a larger etch rate with regard to silicon than with regard to silicon nitride or silicon oxide, and, after etching the baked layer, annealing the remaining baked layer and forming a spin-on-glass oxide layer inside the trench.

Abstract: The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (1); providing and patterning a silicon nitride layer (3) on the semiconductor substrate (1) as topmost layer of a trench etching mask; forming a trench (5) in a first etching step by means of the trench etching mask; conformally depositing a liner layer (10) made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (5); carrying out a V plasma etching step for forming a V profile of the line layer (10) in the trench (5); wherein the liner layer (10) is pulled back to below the top side of the silicon nitride layer (3); an etching gas mixture comprises C5F8, O2 and an inert gas is used in the V plasma etching step; the ratio (V) of C5F8/O2 lies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

Abstract: A method of filling high ratio trenches on a substrate is described. First, an oxidizable layer is deposited on the substrate. Thereafter, a trench fill oxide is deposited on the substrate and on the oxidizable layer. Afterwards, the resulting structure is annealed using an oxygen containing gas such that the oxidizable layer is oxidized.

Abstract: The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (1); providing and patterning a silicon nitride layer (3) on the semiconductor substrate (1) as topmost layer of a trench etching mask; forming a trench (5) in a first etching step by means of the trench etching mask; conformally depositing a liner layer (10) made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (5); carrying out a V plasma etching step for forming a V profile of the line layer (10) in the trench (5); wherein the liner layer (10) is pulled back to below the top side of the silicon nitride layer (3); an etching gas mixture comprises C5F8, O2 and an inert gas is used in the V plasma etching step; the ratio (V) of C5F8/O2 lies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

Abstract: Method for fabricating a trench isolation structure The invention provides a method for fabricating a trench isolation structure, comprising the following steps: forming a mask (3) on a substrate (1); forming at least one trench (2) in the substrate (1) by means of the mask (3); carrying out selective deposition of a first insulation material (5) to at least partially fill the at least one trench (2) in the substrate (1) with the insulation material (5) in the presence of the mask (3); and applying a second insulation material (6) over the entire surface of the structure in order to fill the at least one trench (2) in the substrate (1) at least up to the top side of the mask (3).