Abstract: An output driver circuit for preventing the emission of high-frequency signals, including two MOS output transistors (M2, M1) which are connected in series between the supply voltage (Vcc) and ground, and two capacitors (C1, C2) which are arranged between the output node (N1) and the gate of a respective output transistor. The voltages on the gates of the output transistors are quickly increased to the conductivity threshold before a transition occurs on the output, whereby acceleration circuits supply the gates of the output transistors with high currents. During the transition of the output signal, the acceleration circuits are switched off and smaller currents are applied to the gates of the output transistors; the capacitances (C1, C2), being connected in phase opposition, prevent excessively fast variation of the voltage on the output node.