Patents by Inventor Andreas Roithmeier
Andreas Roithmeier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220294465Abstract: A RFDAC comprising an array of unit-cell power amplifiers, wherein the array comprises a first plurality of unit-cell power amplifiers, a second plurality of unit-cell power amplifiers, and a third plurality of unit-cell power amplifiers; wherein the first plurality of unit-cell power amplifiers are configured to operate in accordance with a first clock; wherein the second plurality of unit-cell power amplifiers are configured to operate in accordance with a second clock; wherein the third plurality of unit-cell power amplifiers are configured to operate in accordance with the first clock or the second clock. The RFDAC also comprising a decoder configured to output the first clock and an enablement signal of the first clock for the first plurality; output the second clock and an enablement signal of the second clock for the second plurality; distinguish between the first clock and the second clock for the third plurality.Type: ApplicationFiled: September 27, 2019Publication date: September 15, 2022Inventors: Filipe DE ANDRADE TABARANI SANTOS, Andreas ROITHMEIER, Timo GOSSMANN, Syed Ahmed AAMIR, Rinaldo ZINKE
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Patent number: 11377306Abstract: The present invention relates to an apparatus for grouping containers, comprising: a first conveyor belt for transporting the containers in a first transport direction; a second conveyor belt; a container receiving device; a transfer device, which is designed to transfer at least some of the containers from the first conveyor belt to the second conveyor belt transversely to the first transport direction and to transfer at least some of the containers transferred to the second conveyor belt to the container receiving device transversely to the first transport direction; and a motor device, in particular a long stator motor device, which is designed to move the transfer device for transferring a container.Type: GrantFiled: September 24, 2019Date of Patent: July 5, 2022Assignee: KRONES AGInventors: Konrad Senn, Andreas Roithmeier, Helmut Schuesslburner
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Publication number: 20210403250Abstract: The present invention relates to an apparatus for grouping containers, comprising: a first conveyor belt for transporting the containers in a first transport direction; a second conveyor belt; a container receiving device; a transfer device, which is designed to transfer at least some of the containers from the first conveyor belt to the second conveyor belt transversely to the first transport direction and to transfer at least some of the containers transferred to the second conveyor belt to the container receiving device transversely to the first transport direction; and a motor device, in particular a long stator motor device, which is designed to move the transfer device for transferring a container.Type: ApplicationFiled: September 24, 2019Publication date: December 30, 2021Inventors: Konrad SENN, Andreas ROITHMEIER, Helmut SCHUESSLBURNER
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Patent number: 11190194Abstract: A digital phase-locked loop has a digitally controlled oscillator with a first coarse tuning field for coarse tuning of the oscillator frequency, a second coarse tuning field for tuning of the oscillator frequency at finer intervals than the first coarse tuning field, and a fine tuning field for tuning the oscillator to an output frequency at finer intervals than the second coarse tuning field. The second coarse tuning field provides open loop tuning and is linear and connected parallel to the first coarse tuning field. The second coarse tuning field provides wide field temperature compensation and frequency error determination at start up based on an interpolated frequency value obtained prior to start up. Faster settling is provided with less complex algorithms.Type: GrantFiled: March 31, 2018Date of Patent: November 30, 2021Assignee: Apple Inc.Inventors: Christian Wicpalek, Andreas Roithmeier, Andreas Leistner, Thomas Gustedt, Herwig Dietl-Steinmaurer, Tobias Buckel
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Publication number: 20210013891Abstract: A digital phase-locked loop has a digitally controlled oscillator with a first coarse tuning field for coarse tuning of the oscillator frequency, a second coarse tuning field for tuning of the oscillator frequency at finer intervals than the first coarse tuning field, and a fine tuning field for tuning the oscillator to an output frequency at finer intervals than the second coarse tuning field. The second coarse tuning field provides open loop tuning and is linear and connected parallel to the first coarse tuning field. The second coarse tuning field provides wide field temperature compensation and frequency error determination at start up based on an interpolated frequency value obtained prior to start up. Faster settling is provided with less complex algorithms.Type: ApplicationFiled: March 31, 2018Publication date: January 14, 2021Inventors: Christian Wicpalek, Andreas Roithmeier, Andreas Leistner, Thomas Gustedt, Herwig Dietl-Steinmaurer, Tobias Buckel
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Patent number: 10651857Abstract: A phase locked loop system includes bias voltage adjustment circuitry and a voltage regulator that outputs a smoothed core voltage to an oscillator. The bias voltage adjustment circuitry is configured to compute a scaled bias voltage based at least on a target frequency for the oscillator. The voltage regulator is configured to input i) the scaled bias voltage and ii) a selected core voltage that is selected based on the target operating frequency of the oscillator and generate the smoothed core voltage for output to the oscillator.Type: GrantFiled: June 28, 2016Date of Patent: May 12, 2020Assignee: Apple Inc.Inventors: Andreas Roithmeier, Thomas Gustedt, Herwig Dietl-Steinmaurer, Christian Wicpalek
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Patent number: 10483911Abstract: Various designs for MOS transistor-based RF switch topologies for high speed capacitive tuning of oscillators switch circuits include a main switch device comprising a gate connected to a control terminal, a drain connected to a first terminal that is connected to the first capacitor, and a source connected to a second terminal that is connected to the second capacitor. The switch further comprises a first NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the first terminal. The switch further comprises a second NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the second terminal. The switch further comprises a pair of PMOS devices each having drains connected respectively to the first and second terminals.Type: GrantFiled: December 28, 2016Date of Patent: November 19, 2019Assignee: Intel CorporationInventors: Svetozar Broussev, Andreas Jörn Leistner, Andreas Roithmeier, Thomas Gustedt
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Publication number: 20180083573Abstract: Various designs for MOS transistor-based RF switch topologies for high speed capacitive tuning of oscillators switch circuits include a main switch device comprising a gate connected to a control terminal, a drain connected to a first terminal that is connected to the first capacitor, and a source connected to a second terminal that is connected to the second capacitor. The switch further comprises a first NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the first terminal. The switch further comprises a second NMOS device having a gate connected to the main switch device gate, a source connected to a ground, and a drain connected to the second terminal. The switch further comprises a pair of PMOS devices each having drains connected respectively to the first and second terminals.Type: ApplicationFiled: December 28, 2016Publication date: March 22, 2018Inventors: Svetozar Broussev, Andreas Jörn Leistner, Andreas Roithmeier, Thomas Gustedt
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Publication number: 20170373694Abstract: A phase locked loop system includes bias voltage adjustment circuitry and a voltage regulator that outputs a smoothed core voltage to an oscillator. The bias voltage adjustment circuitry is configured to compute a scaled bias voltage based at least on a target frequency for the oscillator.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Andreas Roithmeier, Thomas Gustedt, Herwig Dietl-Steinmaurer, Christian Wicpalek
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Patent number: 9413365Abstract: Apparatuses are disclosed which comprise a coarse tuning circuitry, a fine tuning circuitry and at least one switchable capacitance.Type: GrantFiled: March 11, 2010Date of Patent: August 9, 2016Assignee: INTEL DEUTSCHLAND GMBHInventors: Thomas Mayer, Andreas Roithmeier
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Patent number: 8773211Abstract: An electrical circuit includes a circuit element and a common mode rejection circuit element. The circuit element is configured to operate at a selected frequency within a variable frequency range and the common mode rejection circuit element is configured to reject a common mode current through the circuit element, wherein the common mode rejection circuit element is adjustable.Type: GrantFiled: November 25, 2011Date of Patent: July 8, 2014Assignee: Intel Mobile Communications GmbHInventor: Andreas Roithmeier
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Publication number: 20130135057Abstract: An electrical circuit includes a circuit element and a common mode rejection circuit element. The circuit element is configured to operate at a selected frequency within a variable frequency range and the common mode rejection circuit element is configured to reject a common mode current through the circuit element, wherein the common mode rejection circuit element is adjustable.Type: ApplicationFiled: November 25, 2011Publication date: May 30, 2013Applicant: Intel Mobile Communications GmbHInventor: Andreas Roithmeier
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Patent number: 8154356Abstract: An oscillator is provided which comprises an array of capacitances. At least some capacitances in the array have different capacitance values.Type: GrantFiled: December 19, 2009Date of Patent: April 10, 2012Assignee: Infineon Technologies AGInventors: Hans Geltinger, Thomas Gustedt, Andreas Roithmeier, Thomas Mayer
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Publication number: 20110221539Abstract: Apparatuses are disclosed which comprise a coarse tuning circuitry, a fine tuning circuitry and at least one switchable capacitance.Type: ApplicationFiled: March 11, 2010Publication date: September 15, 2011Inventors: Thomas MAYER, Andreas ROITHMEIER
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Publication number: 20110148530Abstract: An oscillator is provided which comprises an array of capacitances. At least some capacitances in the array have different capacitance values.Type: ApplicationFiled: December 19, 2009Publication date: June 23, 2011Inventors: Hans GELTINGER, Thomas Gustedt, Andreas Roithmeier, Thomas Mayer
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Patent number: 7795985Abstract: Implementations of varactor systems compare current data with immediately prior data to determine whether there has been a change in the data, and enable a clock signal for data paths which have changed data.Type: GrantFiled: November 17, 2008Date of Patent: September 14, 2010Assignee: Infineon Technologies AGInventor: Andreas Roithmeier
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Patent number: 7760042Abstract: A frequency modulator includes a tuning circuit configured to determine a nominal gain characteristic of a digitally controlled oscillator (DCO) in a first mode, and to determine an actual gain characteristic of the DCO in a second mode using the nominal gain characteristic. The frequency modulator also comprises a modulation circuit comprising the DCO coupled to the tuning circuit, configured to modulate a frequency of a DCO output signal with a modulation signal input, and to scale the modulated DCO output signal based on the actual gain characteristic in the second mode to provide gain compensation and frequency modulation of the DCO. The tuning circuit may include a select switch to couple a minimal and maximal tuning word to the DCO in the first mode and an actual operating point word in the second mode to the DCO to determine the nominal gain characteristic.Type: GrantFiled: June 26, 2008Date of Patent: July 20, 2010Assignee: Infineon Technologies AGInventors: Thomas Mayer, Andreas Roithmeier
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Publication number: 20100123525Abstract: Implementations of varactor systems compare current data with immediately prior data to determine whether there has been a change in the data, and enable a clock signal for data paths which have changed data.Type: ApplicationFiled: November 17, 2008Publication date: May 20, 2010Applicant: Infineon Technologies AGInventor: Andreas Roithmeier
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Publication number: 20090322439Abstract: A frequency modulator includes a tuning circuit configured to determine a nominal gain characteristic of a digitally controlled oscillator (DCO) in a first mode, and to determine an actual gain characteristic of the DCO in a second mode using the nominal gain characteristic. The frequency modulator also comprises a modulation circuit comprising the DCO coupled to the tuning circuit, configured to modulate a frequency of a DCO output signal with a modulation signal input, and to scale the modulated DCO output signal based on the actual gain characteristic in the second mode to provide gain compensation and frequency modulation of the DCO. The tuning circuit may include a select switch to couple a minimal and maximal tuning word to the DCO in the first mode and an actual operating point word in the second mode to the DCO to determine the nominal gain characteristic.Type: ApplicationFiled: June 26, 2008Publication date: December 31, 2009Applicant: Infineon Technologies AGInventors: Thomas Mayer, Andreas Roithmeier