Patents by Inventor Andreas Schlögl
Andreas Schlögl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200044064Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.Type: ApplicationFiled: October 15, 2019Publication date: February 6, 2020Inventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
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Patent number: 10483383Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.Type: GrantFiled: March 14, 2018Date of Patent: November 19, 2019Assignee: Infineon Technologies Dresden GmbH & Co. KGInventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
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Publication number: 20180269296Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.Type: ApplicationFiled: March 14, 2018Publication date: September 20, 2018Inventors: Joachim Weyers, Katarzyna Kowalik-Seidl, Andreas Schloegl, Enrique Vecino Vazquez
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Patent number: 9748116Abstract: Various embodiments provide an electronic device, wherein the electronic device comprises a mounting surface configured to mount the electronic device to an external structure and having a first size; a backside electrode having a second size and having arranged thereon a die electrically connected to the backside electrode; wherein the first size is at least three times the second size.Type: GrantFiled: July 1, 2016Date of Patent: August 29, 2017Assignee: Infineon Technologies Austria AGInventors: Ralf Otremba, Ulrich Froehler, Felix Grawert, Ernst Katzmaier, Uwe Kirchner, Rene Mente, Andreas Schloegl, Uwe Wahl
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Publication number: 20170005025Abstract: Various embodiments provide an electronic device, wherein the electronic device comprises a mounting surface configured to mount the electronic device to an external structure and having a first size; a backside electrode having a second size and having arranged thereon a die electrically connected to the backside electrode; wherein the first size is at least three times the second size.Type: ApplicationFiled: July 1, 2016Publication date: January 5, 2017Inventors: Ralf OTREMBA, Ulrich FROEHLER, Felix GRAWERT, Ernst KATZMAIER, Uwe KIRCHNER, Rene MENTE, Andreas SCHLOEGL, Uwe WAHL
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Publication number: 20160112041Abstract: A power transistor model is described which comprises a source drain path, a first current source and a voltage controlled second current source in the source drain path which model the static voltage-current-relationship of a modeled power transistor, wherein the voltage-controlled second current source models a nonlinear behavior of a drift zone of the power transistor.Type: ApplicationFiled: October 15, 2014Publication date: April 21, 2016Inventors: Kevni Bueyuektas, Uwe Wahl, Andreas Schloegl, Gerhard Noebauer
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Patent number: 9099454Abstract: A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.Type: GrantFiled: August 12, 2013Date of Patent: August 4, 2015Assignee: Infineon Technologies AGInventors: Ulrich Wachter, Veronika Huber, Thomas Kilger, Ralf Otremba, Bernd Stadler, Dominic Maier, Klaus Schiess, Andreas Schlögl, Uwe Wahl
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Publication number: 20150041967Abstract: A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.Type: ApplicationFiled: August 12, 2013Publication date: February 12, 2015Applicant: Infineon Technologies AGInventors: Ulrich Wachter, Veronika Huber, Thomas Kilger, Ralf Otremba, Bernd Stadler, Dominic Maier, Klaus Schiess, Andreas Schlögl, Uwe Wahl
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Patent number: 8680668Abstract: A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.Type: GrantFiled: February 28, 2012Date of Patent: March 25, 2014Assignee: Infineon Technologies AGInventors: Georg Meyer-Berg, Andreas Schloegl
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Patent number: 8618644Abstract: An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.Type: GrantFiled: August 27, 2012Date of Patent: December 31, 2013Assignee: Infineon Technologies AGInventors: Ralf Otremba, Marco Seibt, Uwe Kirchner, Wolfgang Peinhopf, Michael Treu, Andreas Schloegl, Mario Veldvoss
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Publication number: 20130069211Abstract: A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.Type: ApplicationFiled: February 28, 2012Publication date: March 21, 2013Applicant: INFINEON TECHNOLOGIES AGInventors: Georg Meyer-Berg, Andreas Schloegl
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Publication number: 20120319109Abstract: An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.Type: ApplicationFiled: August 27, 2012Publication date: December 20, 2012Applicant: INFINEON TECHNOLOGIES AGInventors: Ralf Otremba, Marco Seibt, Uwe Kirchner, Wolfgang Peinhopf, Michael Treu, Andreas Schloegl, Mario Feldvoss
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Patent number: 8253225Abstract: An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.Type: GrantFiled: February 22, 2008Date of Patent: August 28, 2012Assignee: Infineon Technologies AGInventors: Ralf Otremba, Marco Seibt, Uwe Kirchner, Wolfgang Peinhopf, Michael Treu, Andreas Schloegl, Mario Feldvoss
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Patent number: 8124449Abstract: A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.Type: GrantFiled: December 2, 2008Date of Patent: February 28, 2012Assignee: Infineon Technologies AGInventors: Georg Meyer-Berg, Andreas Schloegl
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Patent number: 8097944Abstract: A semiconductor device includes a substrate having a chip island, a chip attached to the chip island, and encapsulation material deposited on the chip and part of the chip island. The chip island includes a first main face to which the chip is attached opposite a second main face, with the second main face of the chip island defining at least one cavity.Type: GrantFiled: April 30, 2009Date of Patent: January 17, 2012Assignee: Infineon Technologies AGInventors: Stefan Landau, Ralf Otremba, Uwe Kirchner, Andreas Schloegl, Christian Fachmann, Joachim Mahler
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Publication number: 20100276797Abstract: A semiconductor device includes a substrate having a chip island, a chip attached to the chip island, and encapsulation material deposited on the chip and part of the chip island. The chip island includes a first main face to which the chip is attached opposite a second main face, with the second main face of the chip island defining at least one cavity.Type: ApplicationFiled: April 30, 2009Publication date: November 4, 2010Applicant: INFINEON TECHNOLOGIES AGInventors: Stefan Landau, Ralf Otremba, Uwe Kirchner, Andreas Schloegl, Christian Fachmann, Joachim Mahler
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Publication number: 20100133666Abstract: A device including a semiconductor chip and metal foils. One embodiment provides a device including a semiconductor chip having a first electrode on a first face and a second electrode on a second face opposite to the first face. A first metal foil is attached to the first electrode of the semiconductor chip in an electrically conductive manner. A second metal foil is attached to the second electrode of the semiconductor chip in an electrically conductive manner.Type: ApplicationFiled: December 2, 2008Publication date: June 3, 2010Applicant: INFINEON TECHNOLOGIES AGInventors: Georg Meyer-Berg, Andreas Schloegl
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Publication number: 20090212284Abstract: An electronic device and manufacturing thereof. One embodiment provides a semiconductor chip having a control electrode and a first load electrode on a first surface and a second load electrode on a second surface. A first lead is electrically coupled to the control electrode. A second lead is electrically coupled to the first load electrode. A third lead is electrically coupled to the first load electrode, the third lead being separate from the second lead. A fourth lead is electrically coupled to the second load electrode, the second and third leads being arranged between the first and fourth leads.Type: ApplicationFiled: February 22, 2008Publication date: August 27, 2009Applicant: INFINEON TECHNOLOGIES AGInventors: Ralf Otremba, Marco Seibt, Uwe Kirchner, Wolfgang Peinhopf, Michael Treu, Andreas Schloegl, Mario Feldvoss
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Patent number: 6904128Abstract: A device (4) comprises a container (40) for a liquid coolant (41) that is disposed between the axis (1) and the surface (30) facing the axis to co-rotate with the surface. The device is further provided with an atomizer nozzle (42) of the container, facing the surface, from which the coolant is discharged during rotation of the container due to the centrifugal force (F) acting upon the coolant of the container in the form of an atomized jet (43) that strikes the surface. The device cools a surface of an electronic device (3) that runs hot, the electronic device supplying the X-ray source of a computer tomograph with power and rotating about the axis of the gantry (2) of the tomograph.Type: GrantFiled: September 20, 2001Date of Patent: June 7, 2005Assignee: Siemens AktiengesellschaftInventors: Andreas Schlögl, Peter Tichy, Eckhard Wolfgang
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Patent number: 6838729Abstract: The invention relates to a semiconductor component with enhanced avalanche ruggedness. At the nominal current of this semiconductor component, in the event of an avalanche the voltage applied between two electrodes is 6 % or more above the static reverse voltage at the same temperature.Type: GrantFiled: April 29, 2002Date of Patent: January 4, 2005Assignee: Infineon Technologies AGInventors: Andreas Schlögl, Markus Schmitt, Hans-Joachim Schulze, Markus Vossebürger, Armin Willmeroth