Patents by Inventor Andreas Schlaffer

Andreas Schlaffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9209680
    Abstract: Circuits, arrangements and systems may provide for configuring a portion of an integrated circuit to receive an electrical component, and configuring the integrated circuit to operate in a first mode when the electrical component is a first electrical component or in a second mode when the electrical component is a second electrical component.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: December 8, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventor: Andreas Schlaffer-Zannoth
  • Publication number: 20100277156
    Abstract: Exemplary implementations of electrical circuits and systems are disclosed, and methods for providing a configurable negative voltage supply. Electrical circuits and systems are configured to operate in one of at least two modes, based on an electrical component that is received by a portion of the circuit or system.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 4, 2010
    Applicant: Infineon Technologies AG
    Inventor: Andreas Schlaffer-Zannoth
  • Patent number: 7714641
    Abstract: A voltage regulator arrangement having a first voltage regulator, whose input connection is connected to the supply potential connection and whose output connection is connected to a first supply potential connection of a circuit arrangement, with the first voltage regulator supplying the circuit arrangement with a supply voltage in a rest state. A second voltage regulator is also provided, whose input connection is connected to the supply potential connection, and whose output connection is connected to a second supply potential connection of the circuit arrangement, with the second voltage regulator supplying the circuit arrangement with a supply voltage during its normal operation.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: May 11, 2010
    Assignee: Infineon Technologies AG
    Inventors: Peter Fleischmann, Gerhard Nebel, Andreas Schlaffer, Uwe Weder
  • Patent number: 7129683
    Abstract: A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: October 31, 2006
    Assignee: Infineon Technologies AG
    Inventors: Gunter Haider, Gerhard Nebel, Iker San Sebastian, Andreas Schlaffer, Uwe Weder
  • Publication number: 20060214652
    Abstract: A voltage regulator having a current mirror for decoupling a partial current icluding a first NMOS transistor as a series transistor. In addition, the voltage regulator has a second NMOS transistor, which forms a current mirror with the first NMOS transistor. Furthermore, in the case of the voltage regulator, the first NMOS transistor is connected in series with a first PMOS transistor and a third transistor. The second NMOS transistor is likewise connected in series with a second PMOS transistor and a fourth transistor, the control inputs of the first and second PMOS transistors being connected to one another and the control inputs of the third and fourth transistors being connected to a control terminal for setting the magnitude of the partial current to be decoupled.
    Type: Application
    Filed: January 18, 2006
    Publication date: September 28, 2006
    Applicant: Infineon Technologies AG
    Inventors: Gunter Haider, Gerhard Nebel, Iker San Sebastian, Andreas Schlaffer, Uwe Weder
  • Patent number: 7091770
    Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 15, 2006
    Assignee: Infineon Technologies AG
    Inventor: Andreas Schlaffer
  • Publication number: 20050073285
    Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.
    Type: Application
    Filed: October 21, 2004
    Publication date: April 7, 2005
    Applicant: Infineon Technologies AG
    Inventor: Andreas Schlaffer
  • Publication number: 20050057299
    Abstract: A voltage regulator arrangement having a first voltage regulator, whose input connection is connected to the supply potential connection and whose output connection is connected to a first supply potential connection of a circuit arrangement, with the first voltage regulator supplying the circuit arrangement with a supply voltage in a rest state. A second voltage regulator is also provided, whose input connection is connected to the supply potential connection, and whose output connection is connected to a second supply potential connection of the circuit arrangement, with the second voltage regulator supplying the circuit arrangement with a supply voltage during its normal operation.
    Type: Application
    Filed: September 20, 2004
    Publication date: March 17, 2005
    Applicant: Infineon Technologies AG
    Inventors: Peter Fleischmann, Gerhard Nebel, Andreas Schlaffer, Uwe Weder